[Openmp-commits] [PATCH] D101976: [OpenMP] Unified entry point for SPMD & generic kernels in the device RTL

Johannes Doerfert via Phabricator via Openmp-commits openmp-commits at lists.llvm.org
Thu May 6 08:40:30 PDT 2021


jdoerfert added a comment.

In D101976#2742166 <https://reviews.llvm.org/D101976#2742166>, @JonChesterfield wrote:

> What are the required semantics of the barrier operations? Amdgcn builds them on shared memory, so probably needs a change to the corresponding target_impl to match

I have *not* tested AMDGCN but I was not expecting a problem. The semantics I need here is: 
 warp N, thread     0 hits a barrier instruction I0
 warp N, threads 1-31 hit  a barrier instruction I1
 the entire warp synchronizes and moves on.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101976/new/

https://reviews.llvm.org/D101976



More information about the Openmp-commits mailing list