[Openmp-commits] [PATCH] D62393: [OPENMP][NVPTX]Mark parallel level counter as volatile.
Alexey Bataev via Phabricator via Openmp-commits
openmp-commits at lists.llvm.org
Thu Jun 6 18:48:46 PDT 2019
ABataev added a comment.
In D62393#1533454 <https://reviews.llvm.org/D62393#1533454>, @jdoerfert wrote:
> >> The standard has "levels" and "active-levels". Both need to be tracked but it seems we only have a single array?
> > >
> > They all are tracked on this array.
> Where is that described?
Sorry, read the code. I'm not a debugger.
>> We don't need to synchronize the whole program, we just need to synchronize accesses to the parallelLevel array. In SPMD mode with full runtime (or SPMD mode eith atomic ops) the ptx compiler generates unsafe code for parallelLevel array without being marked as volatile (i.e. simple atomic-like construct in CUDa ).
> Nobody argues we should synchronize the whole program. If you want to have atomic accesses to the parallelLevel array, make the accesses to the parallelLevel array atomic.
> You cannot just say that the PTX compiler generates unsafe code. That is not an argument that is a guess.
Volatile provides required level of atomicity per PTX ISA.
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