[Mlir-commits] [libc] [compiler-rt] [flang] [mlir] [libcxxabi] [openmp] [clang-tools-extra] [libcxx] [llvm] [clang] [AArch64] Add custom lowering for load <3 x i8>. (PR #78632)

llvmlistbot at llvm.org llvmlistbot at llvm.org
Thu Jan 25 09:05:41 PST 2024


github-actions[bot] wrote:

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``````````bash
git-clang-format --diff 22c22d6182e0ee456ff1141be8e178ede6df47bb 109038bab1328d667a6e2eaf01acc82c33c95431 -- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 6dc56ab334..a201fdadc3 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -11025,11 +11025,13 @@ static SDValue shuffleWithSingleLoad(SDValue Op, SelectionDAG &DAG) {
   SDValue V3 = Op.getOperand(3);
   if (V0.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
       V1.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
-      V2.getOpcode() != ISD::LOAD || !(V3.isUndef() || V3.getOpcode() == ISD::EXTRACT_VECTOR_ELT))
+      V2.getOpcode() != ISD::LOAD ||
+      !(V3.isUndef() || V3.getOpcode() == ISD::EXTRACT_VECTOR_ELT))
     return SDValue();
 
   if (V0.getOperand(0) != V1.getOperand(0) ||
-      V0.getConstantOperandVal(1) != 0 || V1.getConstantOperandVal(1) != 1 || !(V3.isUndef() || V3.getConstantOperandVal(1) == 3))
+      V0.getConstantOperandVal(1) != 0 || V1.getConstantOperandVal(1) != 1 ||
+      !(V3.isUndef() || V3.getConstantOperandVal(1) == 3))
     return SDValue();
 
   SDLoc dl(Op);

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https://github.com/llvm/llvm-project/pull/78632


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