[Mlir-commits] [mlir] [mlir][SPIRV] update SPIRV Atomic Ops to assemblyFormat (PR #76323)

Jakub Kuderski llvmlistbot at llvm.org
Wed Jan 3 20:32:57 PST 2024


================
@@ -74,9 +95,9 @@ def SPIRV_AtomicAndOp : SPIRV_AtomicUpdateWithValueOp<"AtomicAnd", []> {
     <!-- End of AutoGen section -->
 
     ```
-    scope ::= `"CrossDevice"` | `"Device"` | `"Workgroup"` | ...
+    scope ::= `<CrossDevice>` | `<Device>` | `<Workgroup>` | ...
 
-    memory-semantics ::= `"None"` | `"Acquire"` | "Release"` | ...
+    memory-semantics ::= `<None>` | `<Acquire>` | <Release>` | ...
 
     atomic-and-op ::=
         `spirv.AtomicAnd` scope memory-semantics
----------------
kuhar wrote:

Now that we use the assembly format, we don't need the Syntax section. We can remove it here any everywhere else where the op uses assembly format.

https://github.com/llvm/llvm-project/pull/76323


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