[Mlir-commits] [mlir] [AMDGPU] Add parameterization for optimized shared memory variables (PR #82508)

llvmlistbot at llvm.org llvmlistbot at llvm.org
Mon Feb 26 17:46:48 PST 2024


================
@@ -37,11 +37,18 @@ using namespace mlir::amdgpu;
 
 /// The size of a shared memory line according to AMD documentation.
 /// https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/instruction-set-architectures/instinct-mi200-cdna2-instruction-set-architecture.pdf
-constexpr int64_t kSharedMemoryLineSizeBytes = 64;
-/// We optimize for 64bit accesses, but this can be made an argument in the
+int64_t kSharedMemoryLineSizeBytes;
+/// We optimize for 128 bit accesses, but this can be made an argument in the
 /// future.
-constexpr int64_t kDefaultVectorSizeBits = 64;
+int64_t kDefaultVectorSizeBits;
 
+void setMemoryLineSize(int64_t _kSharedMemoryLineSizeBytes) {
----------------
harsh-amd wrote:

same here, do we need these functions?

https://github.com/llvm/llvm-project/pull/82508


More information about the Mlir-commits mailing list