[Mlir-commits] [mlir] [MLIR][Mem2Reg][LLVM] Enhance partial load support (PR #89094)

Théo Degioanni llvmlistbot at llvm.org
Wed Apr 17 11:12:05 PDT 2024


Moxinilian wrote:

Yeah most likely. I just mean that using it seems like an edge case (I don't expect it to be super frequent to have loads and stores on the same pointers with different types, right? This seems to only be a concern for dialects at a similar level of abstraction than LLVM). It would be nice if the (I expect) more common case where memory operations are well behaved did not have to bother. But it's only a small thing.

https://github.com/llvm/llvm-project/pull/89094


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