[Mlir-commits] [mlir] [mlir][ArmSME] Support lowering masked vector.outerproduct ops to SME (PR #69604)

[Cullen Rhodes]

================
@@ -578,3 +578,99 @@ func.func @transpose_f64(%arg0: vector<[2]x[2]xf64>) {
   "prevent.dce"(%0) : (vector<[2]x[2]xf64>) -> ()
   return
 }
+
+//===----------------------------------------------------------------------===//
+// vector.outerproduct
+//===----------------------------------------------------------------------===//
+
+// -----
+
+// CHECK-LABEL: @vector_outerproduct_masked_f64
----------------
c-rhodes wrote:

nit: everywhere else the tests are ordered smallest to largest (f16, bf16, f32, f64). It could just as well be largest to smallest, that's not particularly important, but I think consistency is. I'd appreciate it if we could be consistent, it makes reviewing easier.

https://github.com/llvm/llvm-project/pull/69604