[Mlir-commits] [mlir] [mlir][ArmSME] Support lowering masked vector.outerproduct ops to SME (PR #69604)

[Benjamin Maxwell]

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@@ -11,6 +11,9 @@
 
 // RUN: %{compile} | %{run} | FileCheck %s
 
+// REDEFINE: %{entry_point} = test_masked_outerproduct_with_accumulator_2x2xf64
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MacDue wrote:

I've now extended the f64 tests to match the f32 ones (no acc, with acc, masked no acc, masked with acc).

https://github.com/llvm/llvm-project/pull/69604