[Mlir-commits] [mlir] a2d9d2e - [mlir][sparse] re-enable aarch64 test. (#71855)

[llvmlistbot at llvm.org]

Author: Peiming Liu
Date: 2023-11-09T11:46:52-08:00
New Revision: a2d9d2e1d96a3e81f4eed7f70e0a62cbc0e77cfd

URL: https://github.com/llvm/llvm-project/commit/a2d9d2e1d96a3e81f4eed7f70e0a62cbc0e77cfd
DIFF: https://github.com/llvm/llvm-project/commit/a2d9d2e1d96a3e81f4eed7f70e0a62cbc0e77cfd.diff

LOG: [mlir][sparse] re-enable aarch64 test. (#71855)

Should have been fixed by initializing output tensor to zeros in
https://github.com/llvm/llvm-project/pull/71845

Added: 
    

Modified: 
    mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block_matmul.mlir

Removed: 
    


################################################################################
diff  --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block_matmul.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block_matmul.mlir
index 7e9c0ae71a7b7e6..86cda0831fe3273 100644
--- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block_matmul.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_block_matmul.mlir
@@ -17,9 +17,6 @@
 // DEFINE: %{env} =
 //--------------------------------------------------------------------------------------------------
 
-// FIXME: make aarch64 working
-// UNSUPPORTED: target={{.*aarch64.*}}
-
 // RUN: %{compile} | %{run} | FileCheck %s
 //
 // Do the same run, but now with direct IR generation.