[Mlir-commits] [mlir] [mlir][ArmSME] Add support for lowering masked tile_load ops (PR #70915)

Cullen Rhodes llvmlistbot at llvm.org
Thu Nov 2 13:17:28 PDT 2023


c-rhodes wrote:

> ```
>      %row_is_active = arith.cmpi ult %slice_idx, %num_rows : index
>     %slice = scf.if %row_is_active -> vector<[4]xf32> {
>       %slice = vector.maskedload %src[%slice_idx, %c0], %num_cols, %pad_1d :
>         memref<?x?xf32>, vector<[4]xi1>, vector<[4]xf32> into vector<[4]xf32>
>       scf.yield %slice : vector<[4]xf32>
>     } else {
>       scf.yield %pad_1d : vector<[4]xf32>
>     }
> ```
> 
> Could we avoid the if statement by anding the if condition with the mask that always execute the masked load?

I think and'ing `%num_cols` with sign-extension of `%row_is_active` should work, good spot will update this, cheers.

https://github.com/llvm/llvm-project/pull/70915


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