[Mlir-commits] [mlir] fa08afc - [mlir][openacc] Add if, deviceptr operands and default attribute

[llvmlistbot at llvm.org]

Author: Valentin Clement
Date: 2020-09-27T21:28:06-04:00
New Revision: fa08afc3207c4b41b82a1fdfe8265712ec0509b0

URL: https://github.com/llvm/llvm-project/commit/fa08afc3207c4b41b82a1fdfe8265712ec0509b0
DIFF: https://github.com/llvm/llvm-project/commit/fa08afc3207c4b41b82a1fdfe8265712ec0509b0.diff

LOG: [mlir][openacc] Add if, deviceptr operands and default attribute

Add operands to represent if and deviceptr. Default clause is represented with
an attribute.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D88331

Added: 
    

Modified: 
    mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
    mlir/test/Dialect/OpenACC/ops.mlir

Removed: 
    


################################################################################
diff  --git a/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td b/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
index 55db92be47fa..913b80f26adb 100644
--- a/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
+++ b/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
@@ -63,19 +63,19 @@ def OpenACC_ReductionOpAttr : StrEnumAttr<"ReductionOpAttr",
 // Type used in operation below.
 def IntOrIndex : AnyTypeOf<[AnyInteger, Index]>;
 
-//===----------------------------------------------------------------------===//
-// 2.5.1 parallel Construct
-//===----------------------------------------------------------------------===//
-
-// Parallel op default enumeration
+// Parallel and data op default enumeration
 def OpenACC_DefaultNone : StrEnumAttrCase<"none">;
 def OpenACC_DefaultPresent : StrEnumAttrCase<"present">;
 def OpenACC_DefaultAttr : StrEnumAttr<"DefaultAttr",
-    "default attribute value for parallel op",
+    "default attribute values",
     [OpenACC_DefaultNone, OpenACC_DefaultPresent]> {
   let cppNamespace = "::mlir::acc";
 }
 
+//===----------------------------------------------------------------------===//
+// 2.5.1 parallel Construct
+//===----------------------------------------------------------------------===//
+
 def OpenACC_ParallelOp : OpenACC_Op<"parallel",
     [AttrSizedOperandSegments]> {
   let summary = "parallel construct";
@@ -178,7 +178,8 @@ def OpenACC_DataOp : OpenACC_Op<"data",
   }];
 
 
-  let arguments = (ins Variadic<AnyType>:$copyOperands,
+  let arguments = (ins Optional<I1>:$ifCond,
+                       Variadic<AnyType>:$copyOperands,
                        Variadic<AnyType>:$copyinOperands,
                        Variadic<AnyType>:$copyinReadonlyOperands,
                        Variadic<AnyType>:$copyoutOperands,
@@ -187,11 +188,14 @@ def OpenACC_DataOp : OpenACC_Op<"data",
                        Variadic<AnyType>:$createZeroOperands,
                        Variadic<AnyType>:$noCreateOperands,
                        Variadic<AnyType>:$presentOperands,
-                       Variadic<AnyType>:$attachOperands);
+                       Variadic<AnyType>:$deviceptrOperands,
+                       Variadic<AnyType>:$attachOperands,
+                       OptionalAttr<OpenACC_DefaultAttr>:$defaultAttr);
 
   let regions = (region AnyRegion:$region);
 
   let assemblyFormat = [{
+    ( `if` `(` $ifCond^ `)` )?
     ( `copy` `(` $copyOperands^ `:` type($copyOperands) `)` )?
     ( `copyin` `(` $copyinOperands^ `:` type($copyinOperands) `)` )?
     ( `copyin_readonly` `(` $copyinReadonlyOperands^ `:`
@@ -204,6 +208,7 @@ def OpenACC_DataOp : OpenACC_Op<"data",
         type($createZeroOperands) `)` )?
     ( `no_create` `(` $noCreateOperands^ `:` type($noCreateOperands) `)` )?
     ( `present` `(` $presentOperands^ `:` type($presentOperands) `)` )?
+    ( `deviceptr` `(` $deviceptrOperands^ `:` type($deviceptrOperands) `)` )?
     ( `attach` `(` $attachOperands^ `:` type($attachOperands) `)` )?
     $region attr-dict-with-keyword
   }];

diff  --git a/mlir/test/Dialect/OpenACC/ops.mlir b/mlir/test/Dialect/OpenACC/ops.mlir
index 3cfdc129babb..7bd6db3d3909 100644
--- a/mlir/test/Dialect/OpenACC/ops.mlir
+++ b/mlir/test/Dialect/OpenACC/ops.mlir
@@ -454,6 +454,9 @@ func @testparallelop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10xf3
 // -----
 
 func @testdataop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10xf32>) -> () {
+  %ifCond = constant true
+  acc.data if(%ifCond) present(%a : memref<10xf32>) {
+  }
   acc.data present(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
   }
   acc.data copy(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
@@ -472,14 +475,23 @@ func @testdataop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10xf32>)
   }
   acc.data no_create(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
   }
+  acc.data deviceptr(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+  }
   acc.data attach(%a, %b, %c : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
   }
   acc.data copyin(%b: memref<10xf32>) copyout(%c: memref<10x10xf32>) present(%a: memref<10xf32>) {
   }
+  acc.data present(%a : memref<10xf32>) {
+  } attributes { defaultAttr = "none" }
+  acc.data present(%a : memref<10xf32>) {
+  } attributes { defaultAttr = "present" }
   return
 }
 
 // CHECK:      func @testdataop([[ARGA:%.*]]: memref<10xf32>, [[ARGB:%.*]]: memref<10xf32>, [[ARGC:%.*]]: memref<10x10xf32>) {
+// CHECK:      [[IFCOND1:%.*]] = constant true
+// CHECK:      acc.data if([[IFCOND1]]) present([[ARGA]] : memref<10xf32>) {
+// CHECK-NEXT: }
 // CHECK:      acc.data present([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
 // CHECK-NEXT: }
 // CHECK:      acc.data copy([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
@@ -498,7 +510,13 @@ func @testdataop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10xf32>)
 // CHECK-NEXT: }
 // CHECK:      acc.data no_create([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
 // CHECK-NEXT: }
+// CHECK:      acc.data deviceptr([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
+// CHECK-NEXT: }
 // CHECK:      acc.data attach([[ARGA]], [[ARGB]], [[ARGC]] : memref<10xf32>, memref<10xf32>, memref<10x10xf32>) {
 // CHECK-NEXT: }
 // CHECK:      acc.data copyin([[ARGB]] : memref<10xf32>) copyout([[ARGC]] : memref<10x10xf32>) present([[ARGA]] : memref<10xf32>) {
 // CHECK-NEXT: }
+// CHECK:      acc.data present([[ARGA]] : memref<10xf32>) {
+// CHECK-NEXT: } attributes {defaultAttr = "none"}
+// CHECK:      acc.data present([[ARGA]] : memref<10xf32>) {
+// CHECK-NEXT: } attributes {defaultAttr = "present"}