[Mlir-commits] [mlir] 5ad06e4 - [MLIR][docs] Fix typos

[George Mitenkov]

Author: Junda Su
Date: 2020-09-24T12:49:05+03:00
New Revision: 5ad06e43992a766fe048a1b964fd6fd1f10ade71

URL: https://github.com/llvm/llvm-project/commit/5ad06e43992a766fe048a1b964fd6fd1f10ade71
DIFF: https://github.com/llvm/llvm-project/commit/5ad06e43992a766fe048a1b964fd6fd1f10ade71.diff

LOG: [MLIR][docs] Fix typos

Fixed typos in SPIR-V to LLVM manual.

Reviewed By: georgemitenkov

Differential Revision: https://reviews.llvm.org/D88202

Added: 
    

Modified: 
    mlir/docs/SPIRVToLLVMDialectConversion.md

Removed: 
    


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diff  --git a/mlir/docs/SPIRVToLLVMDialectConversion.md b/mlir/docs/SPIRVToLLVMDialectConversion.md
index c28128e0e7eb..e5125d5301c9 100644
--- a/mlir/docs/SPIRVToLLVMDialectConversion.md
+++ b/mlir/docs/SPIRVToLLVMDialectConversion.md
@@ -51,7 +51,7 @@ SPIR-V Dialect                                | LLVM Dialect
 
 SPIR-V distinguishes between array type and run-time array type, the length of
 which is not known at compile time. In LLVM, it is possible to index beyond the
-end of the array. Therfore, runtime array can be implemented as a zero length
+end of the array. Therefore, runtime array can be implemented as a zero length
 array type.
 
 Moreover, SPIR-V supports the notion of array stride. Currently only natural
@@ -617,7 +617,7 @@ As well as:
 ### Branch ops
 
 `spv.Branch` and `spv.BranchConditional` are mapped to `llvm.br` and
-`llvm.cond_br`. Branch weigths for `spv.BranchConditional` are mapped to
+`llvm.cond_br`. Branch weights for `spv.BranchConditional` are mapped to
 corresponding `branch_weights` attribute of `llvm.cond_br`. When translated to
 proper LLVM, `branch_weights` are converted into LLVM metadata associated with
 the conditional branch.