[Mlir-commits] [mlir] 2a19672 - [mlir] Change ODS to have include and exclude regex

[Jacques Pienaar]

Author: Jacques Pienaar
Date: 2020-07-06T09:55:10-07:00
New Revision: 2a19672af5d58d9ee9f8d6276b57cb584d295eb6

URL: https://github.com/llvm/llvm-project/commit/2a19672af5d58d9ee9f8d6276b57cb584d295eb6
DIFF: https://github.com/llvm/llvm-project/commit/2a19672af5d58d9ee9f8d6276b57cb584d295eb6.diff

LOG: [mlir] Change ODS to have include and exclude regex

This makes it easier to have a "remainder" include rule. And also makes it easier to read the command line flag.

Added: 
    

Modified: 
    mlir/test/mlir-tblgen/op-decl.td
    mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp

Removed: 
    


################################################################################
diff  --git a/mlir/test/mlir-tblgen/op-decl.td b/mlir/test/mlir-tblgen/op-decl.td
index 728c38f1d024..b596eee03829 100644
--- a/mlir/test/mlir-tblgen/op-decl.td
+++ b/mlir/test/mlir-tblgen/op-decl.td
@@ -1,5 +1,6 @@
 // RUN: mlir-tblgen -gen-op-decls -I %S/../../include %s | FileCheck  %s
-// RUN: mlir-tblgen -gen-op-decls -op-regex="test.a_op" -I %S/../../include %s | FileCheck  %s --check-prefix=REDUCE
+// RUN: mlir-tblgen -gen-op-decls -op-include-regex="test.a_op" -I %S/../../include %s | FileCheck  %s --check-prefix=REDUCE_INC
+// RUN: mlir-tblgen -gen-op-decls -op-exclude-regex="test.a_op" -I %S/../../include %s | FileCheck  %s --check-prefix=REDUCE_EXC
 
 include "mlir/IR/OpBase.td"
 include "mlir/Interfaces/InferTypeOpInterface.td"
@@ -196,5 +197,8 @@ def _BOp : NS_Op<"_op_with_leading_underscore_and_no_namespace", []>;
 // CHECK-LABEL: _BOp declarations
 // CHECK: class _BOp : public ::mlir::Op<_BOp
 
-// REDUCE-LABEL: NS::AOp declarations
-// REDUCE-NOT: NS::BOp declarations
+// REDUCE_INC-LABEL: NS::AOp declarations
+// REDUCE_INC-NOT: NS::BOp declarations
+
+// REDUCE_EXC-NOT: NS::AOp declarations
+// REDUCE_EXC-LABEL: NS::BOp declarations

diff  --git a/mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp b/mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
index 6c61c5de417b..f391f4be9160 100644
--- a/mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
+++ b/mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
@@ -36,10 +36,14 @@ using namespace mlir::tblgen;
 
 cl::OptionCategory opDefGenCat("Options for -gen-op-defs and -gen-op-decls");
 
-static cl::opt<std::string>
-    opFilter("op-regex",
-             cl::desc("Regex of name of op's to filter (no filter if empty)"),
-             cl::cat(opDefGenCat));
+static cl::opt<std::string> opIncFilter(
+    "op-include-regex",
+    cl::desc("Regex of name of op's to include (no filter if empty)"),
+    cl::cat(opDefGenCat));
+static cl::opt<std::string> opExcFilter(
+    "op-exclude-regex",
+    cl::desc("Regex of name of op's to exclude (no filter if empty)"),
+    cl::cat(opDefGenCat));
 
 static const char *const tblgenNamePrefix = "tblgen_";
 static const char *const generatedArgName = "odsArg";
@@ -2133,13 +2137,20 @@ getAllDerivedDefinitions(const RecordKeeper &recordKeeper,
   if (!classDef)
     PrintFatalError("ERROR: Couldn't find the `" + className + "' class!\n");
 
-  llvm::Regex includeRegex(opFilter);
+  llvm::Regex includeRegex(opIncFilter), excludeRegex(opExcFilter);
   std::vector<Record *> defs;
   for (const auto &def : recordKeeper.getDefs()) {
-    if (def.second->isSubClassOf(classDef)) {
-      if (opFilter.empty() || includeRegex.match(getOperationName(*def.second)))
-        defs.push_back(def.second.get());
-    }
+    if (!def.second->isSubClassOf(classDef))
+      continue;
+    // Include if no include filter or include filter matches.
+    if (!opIncFilter.empty() &&
+        !includeRegex.match(getOperationName(*def.second)))
+      continue;
+    // Unless there is an exclude filter and it matches.
+    if (!opExcFilter.empty() &&
+        excludeRegex.match(getOperationName(*def.second)))
+      continue;
+    defs.push_back(def.second.get());
   }
 
   return defs;