[llvm-testresults] buildbot failure in lab.llvm.org on phase1 - sanity

[llvmlab-buildmaster at lab.llvm.org]

The Buildbot has detected a new failure on builder phase1 - sanity while building llvm.
Full details are available at:
 http://lab.llvm.org:8013/builders/phase1%20-%20sanity/builds/15545

Buildbot URL: http://lab.llvm.org:8013/

Buildslave for this Build: macpro1

Build Reason: scheduler
Build Source Stamp: 199095
Blamelist: alexfh,chandlerc,tnorthover

BUILD FAILED: failed

sincerely,
 -The Buildbot


================================================================================

CHANGES:
File: lib/CodeGen/RegisterCoalescer.cpp
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Mon 13 Jan 2014 02:57:00
Changed By: tnorthover
Comments: ReMat: fix overly cavalier attitude to sub-register indices

There are two attempted optimisations in reMaterializeTrivialDef, trying to
avoid promoting the size of a register too much when rematerializing.
Unfortunately, both appear to be flawed. First, we see if the original register
would have worked, but this is inadequate. Consider:

    v1 = SOMETHING (v1 is QQ)
    v2:Q0 = COPY v1:Q1 (v1, v2 are QQ)
    ...
    uses of v2

In this case even though v2 *could* be used directly as the output of
SOMETHING, this would set the wrong bits of the QQ register involved. The
correct rematerialization must be:

    v2:Q0_Q1 = SOMETHING (v2 promoted to QQQ)
    ...
    uses of v2:Q1_Q2

For the second optimisation, if the correct remat is "v2:idx = SOMETHING" then
we can't necessarily expect v2 itself to be valid for SOMETHING, but we do try
to hunt for a class between v1 and v2 that works. Unfortunately, this is also
wrong:

    v1 = SOMETHING (v1 is QQ)
    v2:Q0_Q1 = COPY v1 (v1 is QQ, v2 is QQQ)
    ...
    uses of v2 as a QQQ

The canonical rematerialization here is "v2:Q0_Q1 = SOMETHING". However current
logic would decide that v2 could be a QQ (no interest is taken in later uses).

This patch, therefore, always accepts the widened register class without trying
to be clever. Generally there is no penalty to this (e.g. in the common GR32 <
GR64 case, expanding the width doesn't matter because it's not like you were
going to do anything else with the high bits of a GR32 register). It can
increase register pressure in cases like the ARM VFP regs though (multiple
non-overlapping but equivalent subregisters). Hopefully this situation is rare
enough that it won't matter.

Unfortunately, no in-tree targets actually expose this as far as I can tell
(there are so few isAsCheapAsAMove instructions for it to trigger on) so I've
been unable to produce a test. It was exposed in our ARM64 SPEC tests though,
and I will be adding a test there that we should be able to contribute
soon(TM).Properties: 




File: docs/CodeGenerator.rst
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Mon 13 Jan 2014 02:57:00
Changed By: tnorthover
Comments: Docs: fix sign of division and increase equivocation on code generated.

I should have been a politician.Properties: 




File: lib/CodeGen/RegisterCoalescer.cpp
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Mon 13 Jan 2014 02:57:00
Changed By: tnorthover
Comments: Revert "ReMat: fix overly cavalier attitude to sub-register indices"

Very sorry, this was a premature patch that I still need to investigate and
finish off (for some reason beyond me at the moment it doesn't actually fix the
issue in all cases).

This reverts commit r199091.Properties: 




Files:
 clang-tidy/ClangTidy.cpp
 clang-tidy/ClangTidy.h
 clang-tidy/ClangTidyDiagnosticConsumer.cpp
 clang-tidy/ClangTidyDiagnosticConsumer.h
 clang-tidy/ClangTidyModule.cpp
 clang-tidy/google/GoogleTidyModule.cpp
 clang-tidy/llvm/LLVMTidyModule.cpp
 test/clang-tidy/basic.cpp
On: http://10.1.1.2/svn/llvm-project
For: clang-tools-extra
At: Mon 13 Jan 2014 03:01:20
Changed By: alexfh
Comments: Add the check name to the clang-tidy diagnostic output.

Summary:
Pass check names all the way from ClangTidyModule through
ClangTidyCheck and ClangTidyContext to ClangTidyError, and output it in
handleErrors. This allows to find mis-behaving check and disable it easily.

Reviewers: djasper, klimek

Reviewed By: djasper

CC: cfe-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2534Properties: 




Files:
 include/llvm/CodeGen/MachineDominators.h
 include/llvm/IR/DominatorInternals.h
 include/llvm/IR/Dominators.h
 include/llvm/IR/Verifier.h
 include/llvm/Support/GenericDomTree.h
 include/llvm/Support/GenericDomTreeConstruction.h
 lib/Analysis/PostDominators.cpp
 lib/CodeGen/GCStrategy.cpp
 lib/IR/Dominators.cpp
 lib/Target/R600/AMDILCFGStructurizer.cpp
 lib/Transforms/Scalar/CodeGenPrepare.cpp
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Mon 13 Jan 2014 03:01:20
Changed By: chandlerc
Comments: [PM] Pull the generic graph algorithms and data structures for dominator
trees into the Support library.

These are all expressed in terms of the generic GraphTraits and CFG,
with no reliance on any concrete IR types. Putting them in support
clarifies that and makes the fact that the static analyzer in Clang uses
them much more sane. When moving the Dominators.h file into the IR
library I claimed that this was the right home for it but not something
I planned to work on. Oops.

So why am I doing this? It happens to be one step toward breaking the
requirement that IR verification can only be performed from inside of
a pass context, which completely blocks the implementation of
verification for the new pass manager infrastructure. Fixing it will
also allow removing the concept of the "preverify" step (WTF???) and
allow the verifier to cleanly flag functions which fail verification in
a way that precludes even computing dominance information. Currently,
that results in a fatal error even when you ask the verifier to not
fatally error. It's awesome like that.

The yak shaving will continue...Properties: 




LOGS: