[llvm-testresults] buildbot failure in lab.llvm.org on phase1 - sanity

llvmlab-buildmaster at lab.llvm.org llvmlab-buildmaster at lab.llvm.org
Mon Aug 4 14:57:50 PDT 2014 

The Buildbot has detected a new failure on builder phase1 - sanity while building llvm.
Full details are available at:
 http://lab.llvm.org:8013/builders/phase1%20-%20sanity/builds/3187

Buildbot URL: http://lab.llvm.org:8013/

Buildslave for this Build: macpro1

Build Reason: scheduler
Build Source Stamp: 214785
Blamelist: chandlerc,echristo,jmolenda,joerg,mcrosier

BUILD FAILED: failed

sincerely,
 -The Buildbot


================================================================================

CHANGES:
Files:
 lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp
 test/CodeGen/AArch64/arm64-AdvSIMD-Scalar.ll
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Mon 04 Aug 2014 14:31:44
Changed By: mcrosier
Comments: [AArch64] Extend the number of scalar instructions supported in the AdvSIMD
scalar integer instruction pass.

This is a patch I had lying around from a few months ago.  The pass is
currently disabled by default, so nothing to interesting.Properties: 




File: include/llvm/Target/TargetMachine.h
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Mon 04 Aug 2014 14:35:44
Changed By: echristo
Comments: Reimplement the temporary non-const getSubtargetImpl routine so
that we can avoid implementing it on every target. Thanks to Richard
Smith for the suggestions!Properties: 




Files:
 docs/GarbageCollection.rst
 include/llvm/CodeGen/LiveRangeEdit.h
 include/llvm/CodeGen/MachineRegisterInfo.h
 include/llvm/CodeGen/SelectionDAGISel.h
 include/llvm/Target/TargetMachine.h
 include/llvm/Target/TargetSubtargetInfo.h
 lib/CodeGen/AggressiveAntiDepBreaker.cpp
 lib/CodeGen/Analysis.cpp
 lib/CodeGen/AsmPrinter/AsmPrinter.cpp
 lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
 lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
 lib/CodeGen/AsmPrinter/DwarfDebug.cpp
 lib/CodeGen/AsmPrinter/DwarfUnit.cpp
 lib/CodeGen/AsmPrinter/ErlangGCPrinter.cpp
 lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp
 lib/CodeGen/AtomicExpandLoadLinkedPass.cpp
 lib/CodeGen/BasicTargetTransformInfo.cpp
 lib/CodeGen/BranchFolding.cpp
 lib/CodeGen/CalcSpillWeights.cpp
 lib/CodeGen/CallingConvLower.cpp
 lib/CodeGen/CodeGenPrepare.cpp
 lib/CodeGen/CriticalAntiDepBreaker.cpp
 lib/CodeGen/DFAPacketizer.cpp
 lib/CodeGen/DeadMachineInstructionElim.cpp
 lib/CodeGen/DwarfEHPrepare.cpp
 lib/CodeGen/EarlyIfConversion.cpp
 lib/CodeGen/ErlangGC.cpp
 lib/CodeGen/ExecutionDepsFix.cpp
 lib/CodeGen/ExpandISelPseudos.cpp
 lib/CodeGen/ExpandPostRAPseudos.cpp
 lib/CodeGen/GCStrategy.cpp
 lib/CodeGen/GlobalMerge.cpp
 lib/CodeGen/IfConversion.cpp
 lib/CodeGen/InlineSpiller.cpp
 lib/CodeGen/LLVMTargetMachine.cpp
 lib/CodeGen/LiveDebugVariables.cpp
 lib/CodeGen/LiveIntervalAnalysis.cpp
 lib/CodeGen/LiveRegMatrix.cpp
 lib/CodeGen/LiveStackAnalysis.cpp
 lib/CodeGen/LiveVariables.cpp
 lib/CodeGen/LocalStackSlotAllocation.cpp
 lib/CodeGen/MachineBasicBlock.cpp
 lib/CodeGen/MachineBlockPlacement.cpp
 lib/CodeGen/MachineCSE.cpp
 lib/CodeGen/MachineCombiner.cpp
 lib/CodeGen/MachineCopyPropagation.cpp
 lib/CodeGen/MachineFunction.cpp
 lib/CodeGen/MachineInstr.cpp
 lib/CodeGen/MachineInstrBundle.cpp
 lib/CodeGen/MachineLICM.cpp
 lib/CodeGen/MachineRegisterInfo.cpp
 lib/CodeGen/MachineSSAUpdater.cpp
 lib/CodeGen/MachineScheduler.cpp
 lib/CodeGen/MachineSink.cpp
 lib/CodeGen/MachineTraceMetrics.cpp
 lib/CodeGen/MachineVerifier.cpp
 lib/CodeGen/OptimizePHIs.cpp
 lib/CodeGen/PHIElimination.cpp
 lib/CodeGen/PeepholeOptimizer.cpp
 lib/CodeGen/PostRASchedulerList.cpp
 lib/CodeGen/ProcessImplicitDefs.cpp
 lib/CodeGen/PrologEpilogInserter.cpp
 lib/CodeGen/RegAllocFast.cpp
 lib/CodeGen/RegAllocGreedy.cpp
 lib/CodeGen/RegAllocPBQP.cpp
 lib/CodeGen/RegisterClassInfo.cpp
 lib/CodeGen/RegisterCoalescer.cpp
 lib/CodeGen/RegisterPressure.cpp
 lib/CodeGen/RegisterScavenging.cpp
 lib/CodeGen/ScheduleDAG.cpp
 lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 lib/CodeGen/SelectionDAG/FastISel.cpp
 lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
 lib/CodeGen/SelectionDAG/InstrEmitter.cpp
 lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp
 lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
 lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
 lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
 lib/CodeGen/SelectionDAG/TargetLowering.cpp
 lib/CodeGen/SjLjEHPrepare.cpp
 lib/CodeGen/Spiller.cpp
 lib/CodeGen/SplitKit.cpp
 lib/CodeGen/StackMapLivenessAnalysis.cpp
 lib/CodeGen/StackMaps.cpp
 lib/CodeGen/StackProtector.cpp
 lib/CodeGen/StackSlotColoring.cpp
 lib/CodeGen/TailDuplication.cpp
 lib/CodeGen/TargetFrameLoweringImpl.cpp
 lib/CodeGen/TargetInstrInfo.cpp
 lib/CodeGen/TargetLoweringBase.cpp
 lib/CodeGen/TargetLoweringObjectFileImpl.cpp
 lib/CodeGen/TargetSchedule.cpp
 lib/CodeGen/TwoAddressInstructionPass.cpp
 lib/CodeGen/VirtRegMap.cpp
 lib/ExecutionEngine/JIT/JIT.cpp
 lib/ExecutionEngine/MCJIT/MCJIT.cpp
 lib/LTO/LTOCodeGenerator.cpp
 lib/LTO/LTOModule.cpp
 lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp
 lib/Target/AArch64/AArch64AsmPrinter.cpp
 lib/Target/AArch64/AArch64BranchRelaxation.cpp
 lib/Target/AArch64/AArch64CallingConvention.td
 lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp
 lib/Target/AArch64/AArch64CollectLOH.cpp
 lib/Target/AArch64/AArch64ConditionalCompares.cpp
 lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
 lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
 lib/Target/AArch64/AArch64FastISel.cpp
 lib/Target/AArch64/AArch64FrameLowering.cpp
 lib/Target/AArch64/AArch64ISelLowering.cpp
 lib/Target/AArch64/AArch64InstrInfo.cpp
 lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
 lib/Target/AArch64/AArch64RegisterInfo.cpp
 lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
 lib/Target/AArch64/AArch64StorePairSuppress.cpp
 lib/Target/AArch64/AArch64Subtarget.h
 lib/Target/AArch64/AArch64TargetMachine.h
 lib/Target/AArch64/AArch64TargetTransformInfo.cpp
 lib/Target/ARM/A15SDOptimizer.cpp
 lib/Target/ARM/ARMAsmPrinter.cpp
 lib/Target/ARM/ARMBaseInstrInfo.cpp
 lib/Target/ARM/ARMBaseRegisterInfo.cpp
 lib/Target/ARM/ARMCodeEmitter.cpp
 lib/Target/ARM/ARMConstantIslandPass.cpp
 lib/Target/ARM/ARMExpandPseudoInsts.cpp
 lib/Target/ARM/ARMFastISel.cpp
 lib/Target/ARM/ARMFrameLowering.cpp
 lib/Target/ARM/ARMHazardRecognizer.cpp
 lib/Target/ARM/ARMISelDAGToDAG.cpp
 lib/Target/ARM/ARMISelLowering.cpp
 lib/Target/ARM/ARMInstrInfo.cpp
 lib/Target/ARM/ARMLoadStoreOptimizer.cpp
 lib/Target/ARM/ARMSelectionDAGInfo.cpp
 lib/Target/ARM/ARMSubtarget.h
 lib/Target/ARM/ARMTargetMachine.h
 lib/Target/ARM/ARMTargetTransformInfo.cpp
 lib/Target/ARM/MLxExpansionPass.cpp
 lib/Target/ARM/Thumb1FrameLowering.cpp
 lib/Target/ARM/Thumb1RegisterInfo.cpp
 lib/Target/ARM/Thumb2ITBlockPass.cpp
 lib/Target/ARM/Thumb2RegisterInfo.cpp
 lib/Target/ARM/Thumb2SizeReduction.cpp
 lib/Target/Hexagon/HexagonCFGOptimizer.cpp
 lib/Target/Hexagon/HexagonCallingConvLower.cpp
 lib/Target/Hexagon/HexagonCopyToCombine.cpp
 lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp
 lib/Target/Hexagon/HexagonFixupHwLoops.cpp
 lib/Target/Hexagon/HexagonFrameLowering.cpp
 lib/Target/Hexagon/HexagonHardwareLoops.cpp
 lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
 lib/Target/Hexagon/HexagonISelLowering.cpp
 lib/Target/Hexagon/HexagonInstrInfo.cpp
 lib/Target/Hexagon/HexagonMachineScheduler.cpp
 lib/Target/Hexagon/HexagonMachineScheduler.h
 lib/Target/Hexagon/HexagonNewValueJump.cpp
 lib/Target/Hexagon/HexagonPeephole.cpp
 lib/Target/Hexagon/HexagonRegisterInfo.cpp
 lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp
 lib/Target/Hexagon/HexagonSplitTFRCondSets.cpp
 lib/Target/Hexagon/HexagonSubtarget.h
 lib/Target/Hexagon/HexagonTargetMachine.h
 lib/Target/Hexagon/HexagonTargetObjectFile.cpp
 lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
 lib/Target/Hexagon/HexagonVarargsCallingConvention.h
 lib/Target/Hexagon/MCTargetDesc/HexagonMCInst.cpp
 lib/Target/MSP430/MSP430BranchSelector.cpp
 lib/Target/MSP430/MSP430FrameLowering.cpp
 lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
 lib/Target/MSP430/MSP430ISelLowering.cpp
 lib/Target/MSP430/MSP430InstrInfo.cpp
 lib/Target/MSP430/MSP430MCInstLower.cpp
 lib/Target/MSP430/MSP430RegisterInfo.cpp
 lib/Target/MSP430/MSP430Subtarget.h
 lib/Target/MSP430/MSP430TargetMachine.h
 lib/Target/Mips/Mips16FrameLowering.cpp
 lib/Target/Mips/Mips16ISelDAGToDAG.cpp
 lib/Target/Mips/Mips16ISelLowering.cpp
 lib/Target/Mips/Mips16RegisterInfo.cpp
 lib/Target/Mips/MipsAsmPrinter.cpp
 lib/Target/Mips/MipsCodeEmitter.cpp
 lib/Target/Mips/MipsConstantIslandPass.cpp
 lib/Target/Mips/MipsDelaySlotFiller.cpp
 lib/Target/Mips/MipsFastISel.cpp
 lib/Target/Mips/MipsFrameLowering.cpp
 lib/Target/Mips/MipsISelLowering.cpp
 lib/Target/Mips/MipsLongBranch.cpp
 lib/Target/Mips/MipsOptimizePICCall.cpp
 lib/Target/Mips/MipsRegisterInfo.cpp
 lib/Target/Mips/MipsSEFrameLowering.cpp
 lib/Target/Mips/MipsSEISelDAGToDAG.cpp
 lib/Target/Mips/MipsSEISelLowering.cpp
 lib/Target/Mips/MipsSEInstrInfo.cpp
 lib/Target/Mips/MipsSERegisterInfo.cpp
 lib/Target/Mips/MipsSubtarget.h
 lib/Target/Mips/MipsTargetMachine.h
 lib/Target/Mips/MipsTargetObjectFile.cpp
 lib/Target/NVPTX/NVPTXAsmPrinter.cpp
 lib/Target/NVPTX/NVPTXFrameLowering.cpp
 lib/Target/NVPTX/NVPTXISelLowering.cpp
 lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp
 lib/Target/NVPTX/NVPTXSubtarget.h
 lib/Target/NVPTX/NVPTXTargetMachine.h
 lib/Target/PowerPC/PPCAsmPrinter.cpp
 lib/Target/PowerPC/PPCBranchSelector.cpp
 lib/Target/PowerPC/PPCCTRLoops.cpp
 lib/Target/PowerPC/PPCCodeEmitter.cpp
 lib/Target/PowerPC/PPCFastISel.cpp
 lib/Target/PowerPC/PPCFrameLowering.cpp
 lib/Target/PowerPC/PPCISelDAGToDAG.cpp
 lib/Target/PowerPC/PPCISelLowering.cpp
 lib/Target/PowerPC/PPCInstrInfo.cpp
 lib/Target/PowerPC/PPCMCInstLower.cpp
 lib/Target/PowerPC/PPCMachineFunctionInfo.cpp
 lib/Target/PowerPC/PPCRegisterInfo.cpp
 lib/Target/PowerPC/PPCSubtarget.h
 lib/Target/PowerPC/PPCTargetMachine.h
 lib/Target/PowerPC/PPCTargetTransformInfo.cpp
 lib/Target/R600/AMDGPUAsmPrinter.cpp
 lib/Target/R600/AMDGPUISelDAGToDAG.cpp
 lib/Target/R600/AMDGPUISelLowering.cpp
 lib/Target/R600/AMDGPUInstrInfo.cpp
 lib/Target/R600/AMDGPUMCInstLower.cpp
 lib/Target/R600/AMDGPUSubtarget.h
 lib/Target/R600/AMDGPUTargetMachine.h
 lib/Target/R600/AMDGPUTargetTransformInfo.cpp
 lib/Target/R600/AMDILCFGStructurizer.cpp
 lib/Target/R600/R600ClauseMergePass.cpp
 lib/Target/R600/R600ControlFlowFinalizer.cpp
 lib/Target/R600/R600EmitClauseMarkers.cpp
 lib/Target/R600/R600ExpandSpecialInstrs.cpp
 lib/Target/R600/R600ISelLowering.cpp
 lib/Target/R600/R600InstrInfo.cpp
 lib/Target/R600/R600OptimizeVectorRegisters.cpp
 lib/Target/R600/R600Packetizer.cpp
 lib/Target/R600/SIFixSGPRCopies.cpp
 lib/Target/R600/SIFixSGPRLiveRanges.cpp
 lib/Target/R600/SIISelLowering.cpp
 lib/Target/R600/SIInsertWaits.cpp
 lib/Target/R600/SIInstrInfo.td
 lib/Target/R600/SILowerControlFlow.cpp
 lib/Target/R600/SILowerI1Copies.cpp
 lib/Target/R600/SIShrinkInstructions.cpp
 lib/Target/Sparc/DelaySlotFiller.cpp
 lib/Target/Sparc/SparcAsmPrinter.cpp
 lib/Target/Sparc/SparcCodeEmitter.cpp
 lib/Target/Sparc/SparcFrameLowering.cpp
 lib/Target/Sparc/SparcISelDAGToDAG.cpp
 lib/Target/Sparc/SparcISelLowering.cpp
 lib/Target/Sparc/SparcRegisterInfo.cpp
 lib/Target/Sparc/SparcSubtarget.h
 lib/Target/Sparc/SparcTargetMachine.h
 lib/Target/SystemZ/SystemZAsmPrinter.cpp
 lib/Target/SystemZ/SystemZElimCompare.cpp
 lib/Target/SystemZ/SystemZFrameLowering.cpp
 lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
 lib/Target/SystemZ/SystemZISelLowering.cpp
 lib/Target/SystemZ/SystemZLongBranch.cpp
 lib/Target/SystemZ/SystemZRegisterInfo.cpp
 lib/Target/SystemZ/SystemZShortenInst.cpp
 lib/Target/SystemZ/SystemZSubtarget.h
 lib/Target/SystemZ/SystemZTargetMachine.h
 lib/Target/TargetLoweringObjectFile.cpp
 lib/Target/TargetMachine.cpp
 lib/Target/TargetMachineC.cpp
 lib/Target/X86/X86AsmPrinter.cpp
 lib/Target/X86/X86CodeEmitter.cpp
 lib/Target/X86/X86FastISel.cpp
 lib/Target/X86/X86FixupLEAs.cpp
 lib/Target/X86/X86FloatingPoint.cpp
 lib/Target/X86/X86FrameLowering.cpp
 lib/Target/X86/X86ISelDAGToDAG.cpp
 lib/Target/X86/X86ISelLowering.cpp
 lib/Target/X86/X86InstrInfo.cpp
 lib/Target/X86/X86MCInstLower.cpp
 lib/Target/X86/X86PadShortFunction.cpp
 lib/Target/X86/X86RegisterInfo.cpp
 lib/Target/X86/X86SelectionDAGInfo.cpp
 lib/Target/X86/X86Subtarget.h
 lib/Target/X86/X86TargetMachine.h
 lib/Target/X86/X86TargetTransformInfo.cpp
 lib/Target/X86/X86VZeroUpper.cpp
 lib/Target/XCore/XCoreAsmPrinter.cpp
 lib/Target/XCore/XCoreFrameLowering.cpp
 lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
 lib/Target/XCore/XCoreISelLowering.cpp
 lib/Target/XCore/XCoreRegisterInfo.cpp
 lib/Target/XCore/XCoreSelectionDAGInfo.cpp
 lib/Target/XCore/XCoreSubtarget.h
 lib/Target/XCore/XCoreTargetMachine.h
 lib/Target/XCore/XCoreTargetObjectFile.cpp
 tools/llc/llc.cpp
 utils/TableGen/CallingConvEmitter.cpp
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Mon 04 Aug 2014 14:35:44
Changed By: echristo
Comments: Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change.Properties: 




File: include/llvm/Target/TargetMachine.h
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Mon 04 Aug 2014 14:35:44
Changed By: echristo
Comments: Reorder to keep data and routines separate and to keep a couple of
similar routines close to each other.Properties: 




File: source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.cpp
On: http://10.1.1.2/svn/llvm-project
For: lldb
At: Mon 04 Aug 2014 14:41:39
Changed By: jmolenda
Comments: Add code to AssemblyParse_x86::get_non_call_site_unwind_plan
to recognize an epilogue that ends with a jmp to 
objc_retainAutoreleaseReturnValue instead of a ret instruction.
<rdar://problem/17889928> 
Properties: 




Files:
 lib/Target/PowerPC/PPCInstrFormats.td
 lib/Target/PowerPC/PPCInstrInfo.td
 test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt
 test/MC/PowerPC/ppc64-encoding-4xx.s
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Mon 04 Aug 2014 14:41:39
Changed By: joerg
Comments: tlbre / tlbwe / tlbsx / tlbsx. variants for the PPC 4xx CPUs.
Properties: 




Files:
 lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 test/CodeGen/X86/select.ll
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Mon 04 Aug 2014 14:41:39
Changed By: chandlerc
Comments: [SDAG] Fix a really, really terrible bug in the DAG combiner.

This code is completely wrong. It is also dead, as if it were to *ever*
run, it would crash. Fortunately, after my work to the combiner, it is
at least *possible* to reach the code, and llvm-stress has found a test
case. Thanks to Patrick for reporting.

It would be really good if anyone who remembers how this code works and
what it was intended to do could add some more obvious test coverage
instead of my completely contrived and reduced test case. My test case
was so brittle I left a bread crumb comment in it to help the next
person to stumble on it and not know what it was actually testing for.Properties: 




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