[llvm-testresults] buildbot failure in lab.llvm.org on phase3 - tree health

Fri Aug 30 05:56:48 PDT 2013

The Buildbot has detected a new failure on builder phase3 - tree health while building lab.llvm.org.
Full details are available at:
 http://lab.llvm.org:8013/builders/phase3%20-%20tree%20health/builds/1812

Buildbot URL: http://lab.llvm.org:8013/

Buildslave for this Build: macpro1

Build Reason: scheduler
Build Source Stamp: 189646
Blamelist: atrick,cdavis,rsmith,wschmidt

BUILD FAILED: failed

sincerely,
 -The Buildbot

================================================================================

CHANGES:
Files:
 lib/Target/PowerPC/PPCFastISel.cpp
 lib/Target/PowerPC/PPCISelLowering.cpp
 lib/Target/PowerPC/PPCInstr64Bit.td
 test/CodeGen/PowerPC/fast-isel-binary.ll
 test/CodeGen/PowerPC/fast-isel-fold.ll
 test/CodeGen/PowerPC/fast-isel-load-store.ll
On: smooshlab-project
At: Thu 29 Aug 2013 19:36:43
Changed By: wschmidt
Comments: [PowerPC] Add loads, stores, and related things to fast-isel.

This is the next big chunk of fast-isel code.  The primary purpose is
to implement selection of loads and stores, but there is a lot of
drag-along to support this.  The common code to analyze addresses for
both loads and stores is substantial.  It's also necessary to add the
materialization code for global values.

Related to load-store processing is the code to fold loads into
integer extends, since otherwise we generate lots of redundant
instructions.  We also need to add some overrides to some FastEmit
routines to ensure we don't assign GPR 0 to a virtual register when
this would change the meaning of an instruction.

I added handling selection of a few binary arithmetic instructions, to
enable committing some test cases I wrote a while back.

Finally, ap couple of miscellaneous changes:
 * I cleaned up some poor style from a previous patch in
   PPCISelLowering.cpp, pointed out by David Blaikie.
 * I enlarged the Addr.Offset field to avoid sign problems with 32-bit
   offsets. 

Properties: 
  phase_id: r189636-t20130829_193843-b10963

Files:
 test/CodeGen/PowerPC/fast-isel-GEP-coalesce.ll
 test/CodeGen/PowerPC/fast-isel-crash.ll
 test/CodeGen/PowerPC/fast-isel-redefinition.ll
 test/CodeGen/PowerPC/fast-isel-shifter.ll
On: smooshlab-project
At: Thu 29 Aug 2013 19:50:43
Changed By: wschmidt
Comments: [PowerPC] Miscellaneous fast-isel test cases.

Here are a few more tests that now pass after the recent fast-isel
commits.
Properties: 
  phase_id: r189639-t20130829_202244-b10966

File: lib/Target/PowerPC/PPCFastISel.cpp
On: smooshlab-project
At: Thu 29 Aug 2013 20:10:43
Changed By: wschmidt
Comments: Remove bogus debug statement.  Sheesh.Properties: 
  phase_id: r189639-t20130829_202244-b10966

Files:
 lib/Target/PowerPC/PPCFastISel.cpp
 test/CodeGen/PowerPC/fast-isel-cmp-imm.ll
On: smooshlab-project
At: Thu 29 Aug 2013 20:20:43
Changed By: wschmidt
Comments: [PowerPC] Handle selection of compare instructions in fast-isel.

Mostly trivial patch adding support for compares.  The meat of the
work was added with the branch support.
Properties: 
  phase_id: r189639-t20130829_202244-b10966

Files:
 include/llvm/CodeGen/MachineScheduler.h
 include/llvm/CodeGen/RegisterPressure.h
 include/llvm/CodeGen/ScheduleDAGInstrs.h
 lib/CodeGen/MachineScheduler.cpp
 lib/CodeGen/RegisterPressure.cpp
 lib/CodeGen/ScheduleDAGInstrs.cpp
 lib/Target/Hexagon/HexagonMachineScheduler.cpp
 lib/Target/Hexagon/HexagonMachineScheduler.h
 test/CodeGen/X86/misched-balance.ll
 test/CodeGen/X86/misched-matmul.ll
 test/CodeGen/X86/misched-matrix.ll
On: smooshlab-project
At: Thu 29 Aug 2013 20:56:43
Changed By: atrick
Comments: mi-sched: Precompute a PressureDiff for each instruction, adjust for liveness later.

Created SUPressureDiffs array to hold the per node PDiff computed during DAG building.

Added a getUpwardPressureDelta API that will soon replace the old
one. Compute PressureDelta here from the precomputed PressureDiffs.

Updating for liveness will come next.Properties: 
  phase_id: r189641-t20130829_213243-b10968

Files:
 include/llvm/CodeGen/RegisterPressure.h
 lib/CodeGen/MachineScheduler.cpp
 test/CodeGen/X86/misched-balance.ll
 test/CodeGen/X86/misched-matmul.ll
 test/CodeGen/X86/misched-matrix.ll
On: smooshlab-project
At: Thu 29 Aug 2013 21:30:43
Changed By: atrick
Comments:  mi-sched: improve the generic register pressure comparison.

Only compare pressure within the same set. When multiple sets are
affected, we prioritize the most constrained set.Properties: 
  phase_id: r189641-t20130829_213243-b10968

Files:
 include/llvm/CodeGen/LiveInterval.h
 lib/CodeGen/LiveRangeEdit.cpp
 lib/CodeGen/RegisterPressure.cpp
On: smooshlab-project
At: Thu 29 Aug 2013 21:36:43
Changed By: atrick
Comments: Replace LiveInterval::killedAt with isKilledAtInstr.

Return true for LRGs that end at EarlyClobber or Register slots.Properties: 
  phase_id: r189646-t20130829_215353-b10971

Files:
 include/llvm/CodeGen/LiveInterval.h
 include/llvm/CodeGen/MachineScheduler.h
 include/llvm/CodeGen/RegisterPressure.h
 lib/CodeGen/MachineScheduler.cpp
 lib/CodeGen/RegisterPressure.cpp
 lib/CodeGen/ScheduleDAGInstrs.cpp
On: smooshlab-project
At: Thu 29 Aug 2013 21:40:43
Changed By: atrick
Comments: mi-sched: update PressureDiffs on-the-fly for liveness.

This removes all expensive pressure tracking logic from the scheduling
critical path of node comparison.Properties: 
  phase_id: r189646-t20130829_215353-b10971

Files:
 include/clang-c/Index.h
 include/clang/AST/Type.h
 include/clang/Basic/Attr.td
 include/clang/Basic/Specifiers.h
 lib/AST/DumpXML.cpp
 lib/AST/MicrosoftMangle.cpp
 lib/AST/Type.cpp
 lib/AST/TypePrinter.cpp
 lib/Basic/Targets.cpp
 lib/CodeGen/CGCall.cpp
 lib/Sema/SemaDeclAttr.cpp
 lib/Sema/SemaType.cpp
 test/CodeGen/ms_abi.c
 test/Sema/callingconv-ms_abi.c
 test/Sema/callingconv-sysv_abi.c
 test/Sema/ms_abi-sysv_abi.c
 tools/libclang/CXType.cpp
On: smooshlab-project
At: Thu 29 Aug 2013 21:46:43
Changed By: cdavis
Comments: Add ms_abi and sysv_abi attribute handling.

Based on a patch by Benno Rice!Properties: 
  phase_id: r189646-t20130829_215353-b10971

File: include/clang/AST/DeclAccessPair.h
On: smooshlab-project
At: Thu 29 Aug 2013 21:50:43
Changed By: rsmith
Comments: Simplify slightly.
Properties: 
  phase_id: r189646-t20130829_215353-b10971

Files:
 include/clang/AST/ASTUnresolvedSet.h
 include/clang/AST/ASTVector.h
 include/clang/AST/DeclCXX.h
 include/clang/AST/UnresolvedSet.h
 include/clang/Serialization/ASTReader.h
 lib/AST/DeclCXX.cpp
 lib/Serialization/ASTReader.cpp
 lib/Serialization/ASTWriter.cpp
 test/PCH/check-deserializations.cpp
On: smooshlab-project
At: Thu 29 Aug 2013 21:50:43
Changed By: rsmith
Comments: Don't eagerly load all conversion operators when loading a class declaration
from a PCH/module.
Properties: 
  phase_id: r189646-t20130829_215353-b10971

LOGS: