[llvm-testresults] ahs3-x86 i686 nightly tester results

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Sat Apr 21 12:06:19 PDT 2007


http://llvm.org/nightlytest/test.php?machine=95&night=2718
Name: ia32
Nickname: ahs3-x86
Buildstatus: OK

New Test Passes:
None

New Test Failures:
None

Added Tests:
test/Analysis/Dominators/2007-04-20-PostDom-Reset.ll
test/Assembler/2007-04-20-AlignedLoad.ll
test/Assembler/2007-04-20-AlignedStore.ll
test/CodeGen/Generic/2006-04-11-vecload.ll: signal(SIGABRT) at line 1
test/CodeGen/Generic/vector-constantexpr.ll: signal(SIGABRT) at line 1
test/CodeGen/Generic/vector-identity-shuffle.ll: exit(1) at line 1
test/CodeGen/Generic/vector.ll: signal(SIGABRT) at line 1
test/CodeGen/PowerPC/2006-04-05-splat-ish.ll: exit(1) at line 1
test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll: signal(SIGABRT) at line 1
test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll: signal(SIGABRT) at line 1
test/CodeGen/PowerPC/buildvec_canonicalize.ll: exit(1) at line 1
test/CodeGen/PowerPC/eqv-andc-orc-nor.ll: signal(SIGABRT) at line 1
test/CodeGen/PowerPC/mem-rr-addr-mode.ll: exit(1) at line 1
test/CodeGen/PowerPC/vcmp-fold.ll: exit(1) at line 1
test/CodeGen/PowerPC/vec_br_cmp.ll: signal(SIGABRT) at line 1
test/CodeGen/PowerPC/vec_constants.ll: signal(SIGABRT) at line 1
test/CodeGen/PowerPC/vec_shuffle.ll: signal(SIGABRT) at line 1
test/CodeGen/PowerPC/vec_spat.ll: exit(1) at line 1
test/CodeGen/PowerPC/vec_zero.ll: exit(1) at line 1
test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll: signal(SIGABRT) at line 1
test/CodeGen/X86/2006-05-11-InstrSched.ll: exit(1) at line 1
test/CodeGen/X86/2006-10-13-CycleInDAG.ll: signal(SIGABRT) at line 1
test/CodeGen/X86/mmx-arith.ll: signal(SIGABRT) at line 1
test/CodeGen/X86/vec_insert.ll: signal(SIGABRT) at line 1
test/CodeGen/X86/vec_ins_extract.ll: signal(SIGABRT) at line 1
test/CodeGen/X86/vec_select.ll: signal(SIGABRT) at line 1
test/CodeGen/X86/vec_set.ll: exit(1) at line 1
test/CodeGen/X86/vec_shuffle-10.ll: exit(1) at line 1
test/CodeGen/X86/vec_shuffle-2.ll: signal(SIGABRT) at line 1
test/CodeGen/X86/vec_shuffle-4.ll: signal(SIGABRT) at line 1
test/CodeGen/X86/vec_shuffle-5.ll: signal(SIGABRT) at line 1
test/CodeGen/X86/vec_shuffle-7.ll: signal(SIGABRT) at line 1
test/CodeGen/X86/vec_shuffle-8.ll: signal(SIGABRT) at line 1
test/CodeGen/X86/vec_shuffle.ll: signal(SIGABRT) at line 1
test/CodeGen/X86/vec_splat-2.ll: exit(1) at line 1
test/CodeGen/X86/vec_splat.ll: exit(1) at line 1
test/CodeGen/X86/vec_zero.ll: exit(1) at line 1


Removed Tests:
test/CodeGen/Generic/2006-04-11-vecload.ll
test/CodeGen/Generic/vector-constantexpr.ll
test/CodeGen/Generic/vector-identity-shuffle.ll
test/CodeGen/Generic/vector.ll
test/CodeGen/PowerPC/2006-04-05-splat-ish.ll
test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll
test/CodeGen/PowerPC/2007-03-30-SpillerCrash.ll
test/CodeGen/PowerPC/buildvec_canonicalize.ll
test/CodeGen/PowerPC/eqv-andc-orc-nor.ll
test/CodeGen/PowerPC/mem-rr-addr-mode.ll
test/CodeGen/PowerPC/vcmp-fold.ll
test/CodeGen/PowerPC/vec_br_cmp.ll
test/CodeGen/PowerPC/vec_constants.ll
test/CodeGen/PowerPC/vec_shuffle.ll
test/CodeGen/PowerPC/vec_spat.ll
test/CodeGen/PowerPC/vec_zero.ll
test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
test/CodeGen/X86/2006-05-11-InstrSched.ll
test/CodeGen/X86/2006-10-13-CycleInDAG.ll
test/CodeGen/X86/mmx-arith.ll
test/CodeGen/X86/vec_insert.ll
test/CodeGen/X86/vec_ins_extract.ll
test/CodeGen/X86/vec_select.ll
test/CodeGen/X86/vec_set.ll
test/CodeGen/X86/vec_shuffle-10.ll
test/CodeGen/X86/vec_shuffle-2.ll
test/CodeGen/X86/vec_shuffle-4.ll
test/CodeGen/X86/vec_shuffle-5.ll
test/CodeGen/X86/vec_shuffle-7.ll
test/CodeGen/X86/vec_shuffle-8.ll
test/CodeGen/X86/vec_shuffle.ll
test/CodeGen/X86/vec_splat-2.ll
test/CodeGen/X86/vec_splat.ll
test/CodeGen/X86/vec_zero.ll


Significant changes in test results:




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