[llvm-testresults] Debian GNU/Linux i686 Nightly Test

[Al Stone]

http://www.toolchain.org/~ahs3/Sites/ia32

DEJAGNU TEST RESULTS:
  FAIL: /home/ahs3/llvm/build/llvm/test/Regression/BugPoint/misopt-basictest.ll: 
  FAIL: /home/ahs3/llvm/build/llvm/test/Regression/CFrontend/2003-08-18-SigSetJmp.c: 
  FAIL: /home/ahs3/llvm/build/llvm/test/Regression/CFrontend/2005-12-04-AttributeUsed.c: 
  FAIL: /home/ahs3/llvm/build/llvm/test/Regression/CFrontend/2005-12-04-DeclarationLineNumbers.c: 
  FAIL: /home/ahs3/llvm/build/llvm/test/Regression/CFrontend/2006-01-16-BitCountIntrinsicsUnsigned.c: 
  FAIL: /home/ahs3/llvm/build/llvm/test/Regression/CodeGen/Generic/vector.ll: 

DEJAGNU STATISTICS:
  # of expected passes		1294
  # of unexpected failures	6
  # of expected failures		37

USERS WHO COMMITTED:
  alenhar2
  evancheng
  jeffc
  jlaskey
  lattner
  sampo

ADDED FILES:
  llvm/test/Regression/Analysis/DSGraph/2006-03-27-LinkedCollapsed.ll
  llvm/test/Regression/CodeGen/Generic/2006-03-27-DebugInfoNULLDeclare.ll

CHANGED FILES:
  llvm/docs/TestingGuide.html
  llvm/include/llvm/CodeGen/DwarfWriter.h
  llvm/include/llvm/CodeGen/SelectionDAGNodes.h
  llvm/include/llvm/CodeGen/ValueTypes.h
  llvm/include/llvm/CodeGen/ValueTypes.td
  llvm/include/llvm/IntrinsicInst.h
  llvm/include/llvm/Intrinsics.td
  llvm/include/llvm/IntrinsicsPowerPC.td
  llvm/include/llvm/Target/MRegisterInfo.h
  llvm/include/llvm/Use.h
  llvm/lib/Analysis/DataStructure/DataStructure.cpp
  llvm/lib/CodeGen/DwarfWriter.cpp
  llvm/lib/CodeGen/MachineDebugInfo.cpp
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
  llvm/lib/Target/Alpha/AlphaRegisterInfo.h
  llvm/lib/Target/IA64/IA64RegisterInfo.cpp
  llvm/lib/Target/IA64/IA64RegisterInfo.h
  llvm/lib/Target/MRegisterInfo.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/PowerPC/PPCInstrAltivec.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
  llvm/lib/Target/PowerPC/PPCRegisterInfo.h
  llvm/lib/Target/PowerPC/README_ALTIVEC.txt
  llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
  llvm/lib/Target/Sparc/SparcRegisterInfo.h
  llvm/lib/Target/SparcV9/SparcV9RegisterInfo.cpp
  llvm/lib/Target/SparcV9/SparcV9RegisterInfo.h
  llvm/lib/Target/TargetSelectionDAG.td
  llvm/lib/Target/X86/README.txt
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/lib/Target/X86/X86InstrSSE.td
  llvm/lib/Target/X86/X86RegisterInfo.cpp
  llvm/lib/Target/X86/X86RegisterInfo.h
  llvm/test/Regression/CodeGen/X86/vec_shuffle.ll
  llvm/utils/TableGen/CodeGenIntrinsics.h
  llvm/utils/TableGen/CodeGenTarget.cpp
  llvm/utils/TableGen/CodeGenTarget.h
  llvm/utils/TableGen/DAGISelEmitter.cpp
  llvm/win32/VMCore/VMCore.vcproj