[llvm-testresults] Debian GNU/Linux ia64 Nightly Test

[Al Stone]

http://www.toolchain.org/~ahs3/Sites/ia64

Warning: empty y range [0:0], adjusting to [-1:1]
Warning: empty y range [0:0], adjusting to [-1:1]
Warning: empty y range [0:0], adjusting to [-1:1]
Warning: empty y range [0:0], adjusting to [-1:1]

USERS WHO COMMITTED:
  jeffc
  lattner
  sampo

ADDED FILES:
  llvm/test/Regression/CFrontend/2005-07-26-UnionInitCrash.c

CHANGED FILES:
  llvm-gcc/gcc/llvm-expand.c
  llvm-test/Makefile.programs
  llvm/examples/ParallelJIT/ParallelJIT.cpp
  llvm/include/llvm/Analysis/Interval.h
  llvm/include/llvm/BasicBlock.h
  llvm/include/llvm/CodeGen/MachineRelocation.h
  llvm/include/llvm/CodeGen/SelectionDAGNodes.h
  llvm/include/llvm/Config/config.h.in
  llvm/include/llvm/Support/Annotation.h
  llvm/include/llvm/Support/CommandLine.h
  llvm/include/llvm/Support/DataTypes.h.in
  llvm/include/llvm/Support/MutexGuard.h
  llvm/include/llvm/System/Mutex.h
  llvm/include/llvm/System/Path.h
  llvm/include/llvm/System/Process.h
  llvm/include/llvm/Target/TargetLowering.h
  llvm/include/llvm/Target/TargetMachine.h
  llvm/lib/Analysis/DataStructure/BottomUpClosure.cpp
  llvm/lib/Bytecode/Reader/Reader.cpp
  llvm/lib/Bytecode/Reader/ReaderWrappers.cpp
  llvm/lib/Bytecode/Writer/Writer.cpp
  llvm/lib/CodeGen/ELFWriter.cpp
  llvm/lib/CodeGen/IntrinsicLowering.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/lib/ExecutionEngine/Interpreter/Interpreter.cpp
  llvm/lib/ExecutionEngine/JIT/JIT.cpp
  llvm/lib/ExecutionEngine/JIT/JITEmitter.cpp
  llvm/lib/Support/Compressor.cpp
  llvm/lib/System/Mutex.cpp
  llvm/lib/System/ltdl.h
  llvm/lib/Target/Alpha/AlphaCodeEmitter.cpp
  llvm/lib/Target/Alpha/AlphaISelPattern.cpp
  llvm/lib/Target/Alpha/AlphaJITInfo.cpp
  llvm/lib/Target/IA64/IA64ISelPattern.cpp
  llvm/lib/Target/PowerPC/PPC32CodeEmitter.cpp
  llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
  llvm/lib/Target/PowerPC/PPC32RegisterInfo.cpp
  llvm/lib/Target/PowerPC/PPC32Relocations.h
  llvm/lib/Target/PowerPC/PowerPCBranchSelector.cpp
  llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp
  llvm/lib/Target/PowerPC/README.txt
  llvm/lib/Target/SparcV8/FPMover.cpp
  llvm/lib/Target/SparcV8/SparcV8ISelPattern.cpp
  llvm/lib/Target/SparcV9/EmitBytecodeToAssembly.cpp
  llvm/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp
  llvm/lib/Target/SparcV9/InstrSched/SchedGraph.cpp
  llvm/lib/Target/SparcV9/InstrSched/SchedGraph.h
  llvm/lib/Target/SparcV9/InstrSched/SchedGraphCommon.cpp
  llvm/lib/Target/SparcV9/InstrSched/SchedPriorities.cpp
  llvm/lib/Target/SparcV9/InstrSched/SchedPriorities.h
  llvm/lib/Target/SparcV9/LiveVar/BBLiveVar.cpp
  llvm/lib/Target/SparcV9/MachineFunctionInfo.cpp
  llvm/lib/Target/SparcV9/MachineFunctionInfo.h
  llvm/lib/Target/SparcV9/MappingInfo.cpp
  llvm/lib/Target/SparcV9/MappingInfo.h
  llvm/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.cpp
  llvm/lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.h
  llvm/lib/Target/SparcV9/ModuloScheduling/MSSchedule.cpp
  llvm/lib/Target/SparcV9/ModuloScheduling/MSSchedule.h
  llvm/lib/Target/SparcV9/ModuloScheduling/MSScheduleSB.cpp
  llvm/lib/Target/SparcV9/ModuloScheduling/MSScheduleSB.h
  llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.cpp
  llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraph.h
  llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraphSB.cpp
  llvm/lib/Target/SparcV9/ModuloScheduling/MSchedGraphSB.h
  llvm/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.cpp
  llvm/lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.h
  llvm/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.cpp
  llvm/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.h
  llvm/lib/Target/SparcV9/RegAlloc/InterferenceGraph.cpp
  llvm/lib/Target/SparcV9/RegAlloc/LiveRange.h
  llvm/lib/Target/SparcV9/RegAlloc/LiveRangeInfo.cpp
  llvm/lib/Target/SparcV9/RegAlloc/LiveRangeInfo.h
  llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
  llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h
  llvm/lib/Target/SparcV9/RegAlloc/RegClass.cpp
  llvm/lib/Target/SparcV9/RegAlloc/RegClass.h
  llvm/lib/Target/SparcV9/SparcV9BurgISel.cpp
  llvm/lib/Target/SparcV9/SparcV9FrameInfo.h
  llvm/lib/Target/SparcV9/SparcV9InstrForest.h
  llvm/lib/Target/SparcV9/SparcV9Internals.h
  llvm/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp
  llvm/lib/Target/SparcV9/SparcV9RegClassInfo.cpp
  llvm/lib/Target/SparcV9/SparcV9RegClassInfo.h
  llvm/lib/Target/SparcV9/SparcV9RegInfo.cpp
  llvm/lib/Target/SparcV9/SparcV9RegInfo.h
  llvm/lib/Target/SparcV9/SparcV9SchedInfo.cpp
  llvm/lib/Target/SparcV9/SparcV9TargetMachine.cpp
  llvm/lib/Target/SparcV9/SparcV9TmpInstr.cpp
  llvm/lib/Target/TargetFrameInfo.cpp
  llvm/lib/Target/TargetSubtarget.cpp
  llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
  llvm/lib/Target/X86/X86AsmPrinter.cpp
  llvm/lib/Target/X86/X86ISelPattern.cpp
  llvm/lib/Target/X86/X86ISelSimple.cpp
  llvm/lib/Target/X86/X86InstrInfo.h
  llvm/lib/Target/X86/X86PeepholeOpt.cpp
  llvm/lib/Target/X86/X86RegisterInfo.cpp
  llvm/lib/Target/X86/X86Subtarget.cpp
  llvm/lib/Target/X86/X86Subtarget.h
  llvm/lib/Target/X86/X86TargetMachine.cpp
  llvm/lib/Transforms/IPO/PruneEH.cpp
  llvm/lib/Transforms/IPO/SimplifyLibCalls.cpp
  llvm/lib/Transforms/Scalar/InstructionCombining.cpp
  llvm/lib/Transforms/Scalar/Reassociate.cpp
  llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
  llvm/lib/Transforms/Utils/CloneModule.cpp
  llvm/lib/Transforms/Utils/InlineFunction.cpp
  llvm/lib/Transforms/Utils/Local.cpp
  llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
  llvm/lib/VMCore/Type.cpp
  llvm/tools/bugpoint/ExecutionDriver.cpp
  llvm/tools/bugpoint/Miscompilation.cpp
  llvm/tools/llvmc/CompilerDriver.cpp
  llvm/tools/llvmc/llvmc.cpp
  llvm/utils/TableGen/AsmWriterEmitter.cpp