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In addition to what Tim stated, if you actually do need to expand SIGN_EXTEND_INREG in SDISel,</div>
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you might try structuring your target lowering like this (e.g., on a typical 32-bit ISA):<br>
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setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16, Expand);
<div> setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand);</div>
<span> setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand);</span></div>
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It wasn't clear from your prose ("<font>setOperationType() to Expand</font>") how you actually set up your TLI.<br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> llvm-dev <llvm-dev-bounces@lists.llvm.org> on behalf of Zhang via llvm-dev <llvm-dev@lists.llvm.org><br>
<b>Sent:</b> Thursday, December 2, 2021 10:07 PM<br>
<b>To:</b> llvm-dev <llvm-dev@lists.llvm.org><br>
<b>Subject:</b> [llvm-dev] What's SEXT_INREG and why DAGCombiner is producing it?</font>
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<div><font>Hi:</font></div>
<div><font>In my toy compiler backend, I currently don't / won't support SEXT_IN_REG, mostly due to the lack of documentation explains its difference between the "normal" sext.</font></div>
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<div><font>However, when compiling a test program, I notice the following messaging emitted by llc, despite already called ``setOperationType() to Expand``:</font></div>
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<div><font>```</font></div>
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<div>Combining: t41: i32 = sra t40, Constant:i64<31>, .\examples\crc.c:72:12</div>
<div>Creating new node: t44: i32 = sign_extend_inreg t2, ValueType:ch:i1, .\examples\crc.c:72:12</div>
<div> ... into: t44: i32 = sign_extend_inreg t2, ValueType:ch:i1, .\examples\crc.c:72:12</div>
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<div><font>```</font></div>
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</font></div>
<div><font>I was under the impression the setOperationType(....EXPAND) call should instruct the ISel System to expand this DAG Node?</font></div>
<div><font>Another question would be, what's the correct semantic for SEXT_IN_REG? Can I just implement it as SExt?</font></div>
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<div><font>Zhang</font></div>
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