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<p class="MsoNormal">This logic was originally added in <a href="https://reviews.llvm.org/rG65df808f6254617b9eee931d00e95d900610b660">
https://reviews.llvm.org/rG65df808f6254617b9eee931d00e95d900610b660</a> .  I’m not sure what the code is trying to do.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">In general, the number of instructions it takes to load a value into registers from memory should be comparable to the number of instructions it takes to synthesize it in registers.  It shouldn’t really matter if the type is legal.  I can
 think of two reasons the type would matter:<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<li class="MsoListParagraph" style="margin-left:0in;mso-list:l0 level1 lfo2">Controlling the size of the lookup table; creating a table with types that are very large, or have a lot of padding, could be inefficient.<o:p></o:p></li><li class="MsoListParagraph" style="margin-left:0in;mso-list:l0 level1 lfo2">Lowering a PHI node here could make it harder for other passes, like instcombine, to slice it up later.  But we’re restricted the switch-to-lookup table combine so it only runs late,
 so probably less of a concern now than it used to be.<o:p></o:p></li></ol>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">-Eli<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal"><b>From:</b> Craig Topper <craig.topper@gmail.com> <br>
<b>Sent:</b> Friday, July 30, 2021 8:56 AM<br>
<b>To:</b> llvm-dev <llvm-dev@lists.llvm.org>; Eli Friedman <efriedma@quicinc.com>; Alex Bradbury <asb@lowrisc.org><br>
<b>Subject:</b> [EXT] SimplifyCFG's switch to lookup table with illegal types.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">ShouldBuildLookupTable contains a check to make sure the type of the Phi is legal for the target. This currently prevents i32 lookup tables from being formed on RISCV64 which only has i64 as a legal type. Obviously i32 is going to be a
 more widespread type than i64 for C code so I would like to improve this. But i8/i16 are also disabled on RISCV, ARM, AArch64, and probably other targets which can do an i8/i16 load.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">What is the right check here? Can we make sure it fits in the largest native integer type from data layout instead? Or should we add another TTI hook to ask the target?<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Thanks,<br clear="all">
<o:p></o:p></p>
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<p class="MsoNormal">~Craig<o:p></o:p></p>
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