<div dir="ltr">Hi All,<div><br></div><div>Someone submitted a review for a JITLink RISCV implementation recently -- <a href="https://reviews.llvm.org/D105429">https://reviews.llvm.org/D105429</a>. Was this one of you? :)<div><br><div>-- Lang.</div></div></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Thu, Apr 22, 2021 at 6:15 AM Stefan Gränitz <<a href="mailto:stefan.graenitz@gmail.com">stefan.graenitz@gmail.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-style:solid;border-left-color:rgb(204,204,204);padding-left:1ex">
<div>
As codegen exists for RISCV, this comes down to providing a proper
link step I believe. For the longest time LLVM JIT used RuntimeDyld
for it, but it hasn't seen many extensions recently. JITLink has
backends for MachO x86-64/ARM64 and ELF x86-64 currently. I think
ELF ARM32/64 are highly desirable and there seems to be interest in
a COFF backend as well. I like the idea of adding RISCV here!<br>
<br>
The vast majority of code was written by Lang Hames (cc). I had the
opportunity to help with a few details in the ELF implementation and
I am familiar with most of the relevant JIT parts. Adding a backend
for a new arch, however, requires decent domain knowledge. If
there's an effort to make one, I am happy to join, but it's a little
more than a spare time project.<br>
<br>
<div>On 21/04/2021 05:47, Du Chao via
llvm-dev wrote:<br>
</div>
<blockquote type="cite">
<div>Hi all,</div>
<div><br>
</div>
<div>May I know if there is any plan to add RISCV support in LLVM
JIT ?</div>
<div><br>
</div>
<div>Regards,</div>
<div>Du Chao</div>
<div><br>
</div>
<div><br>
</div>
<br>
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