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<p class="MsoNormal">I see three questions here:<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<li class="MsoListParagraph" style="margin-left:0in;mso-list:l0 level1 lfo1">Why does LoopInfo partition loops the way it does? It’s the most straightforward way to define a “loop”. See
<a href="https://llvm.org/docs/LoopTerminology.html">https://llvm.org/docs/LoopTerminology.html</a> .<o:p></o:p></li><li class="MsoListParagraph" style="margin-left:0in;mso-list:l0 level1 lfo1">Why doesn’t LoopSimplify split the loop into a nested loop? See separateNestedLoop in llvm/lib/Transforms/Utils/LoopSimplify.cpp; essentially, separating out a nested loop is based
on a heuristic, and your example doesn’t trigger that heuristic. I don’t think anyone has looked at this in a long time.<o:p></o:p></li><li class="MsoListParagraph" style="margin-left:0in;mso-list:l0 level1 lfo1">Why does LICM hoist out conditionally executed instructions? Fewer instructions inside the loop means it’s easier to analyze/optimize. LoopSink can reverse the transform later if
it makes sense.<o:p></o:p></li></ol>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">-Eli<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal"><b>From:</b> llvm-dev <llvm-dev-bounces@lists.llvm.org> <b>On Behalf Of
</b>Jingu Kang via llvm-dev<br>
<b>Sent:</b> Monday, July 5, 2021 5:53 AM<br>
<b>To:</b> llvm-dev@lists.llvm.org<br>
<b>Subject:</b> [EXT] [llvm-dev] Question about Loop with multiple latches and LICM<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Hi All,<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">I have a couple of questions about loop multiple latches and LICM. Let see a simple LLVM IR code snippet.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">define void @test(i1 %a, i32 %b, i8* noalias %src, i8* noalias %dst) {<o:p></o:p></p>
<p class="MsoNormal">entry:<o:p></o:p></p>
<p class="MsoNormal"> br label %while.cond<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">while.cond: ; preds = %sw.bb4001, %while.body, %while.body, %entry<o:p></o:p></p>
<p class="MsoNormal"> br i1 %a, label %while.end6895, label %while.body<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">while.body: ; preds = %while.cond<o:p></o:p></p>
<p class="MsoNormal"> switch i32 %b, label %sw.default6833 [<o:p></o:p></p>
<p class="MsoNormal"> i32 82, label %no_ret<o:p></o:p></p>
<p class="MsoNormal"> i32 30, label %sw.bb4001<o:p></o:p></p>
<p class="MsoNormal"> i32 40, label %while.cond<o:p></o:p></p>
<p class="MsoNormal"> i32 41, label %while.cond<o:p></o:p></p>
<p class="MsoNormal"> ]<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">sw.bb4001: ; preds = %while.body<o:p></o:p></p>
<p class="MsoNormal"> %addr = getelementptr i8, i8* %src, i32 31<o:p></o:p></p>
<p class="MsoNormal"> %res = load i8, i8* %addr<o:p></o:p></p>
<p class="MsoNormal"> store i8 %res, i8* %dst<o:p></o:p></p>
<p class="MsoNormal"> br label %while.cond<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">sw.default6833: ; preds = %while.body<o:p></o:p></p>
<p class="MsoNormal"> unreachable<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">while.end6895: ; preds = %while.cond<o:p></o:p></p>
<p class="MsoNormal"> unreachable<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">no_ret: ; preds = %while.body<o:p></o:p></p>
<p class="MsoNormal"> ret void<o:p></o:p></p>
<p class="MsoNormal">}<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">LLVM detects loop as below.<o:p></o:p></p>
<p class="MsoNormal">Loop at depth 1 containing: %while.cond<header><exiting>,%while.body<latch><exiting>,%sw.bb4001<latch><o:p></o:p></p>
<p class="MsoNormal">Loop at depth 1 containing: <o:p></o:p></p>
<p class="MsoNormal"><header><exiting><o:p></o:p></p>
<p class="MsoNormal">while.cond: ; preds = %sw.bb4001, %while.body, %while.body, %entry<o:p></o:p></p>
<p class="MsoNormal"> br i1 %a, label %while.end6895, label %while.body<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><latch><exiting><o:p></o:p></p>
<p class="MsoNormal">while.body: ; preds = %while.cond<o:p></o:p></p>
<p class="MsoNormal"> switch i32 %b, label %sw.default6833 [<o:p></o:p></p>
<p class="MsoNormal"> i32 82, label %no_ret<o:p></o:p></p>
<p class="MsoNormal"> i32 30, label %sw.bb4001<o:p></o:p></p>
<p class="MsoNormal"> i32 40, label %while.cond<o:p></o:p></p>
<p class="MsoNormal"> i32 41, label %while.cond<o:p></o:p></p>
<p class="MsoNormal"> ]<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><latch><o:p></o:p></p>
<p class="MsoNormal">sw.bb4001: ; preds = %while.body<o:p></o:p></p>
<p class="MsoNormal" style="text-indent:4.8pt">br label %while.cond<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">I can see llvm checks header and its backedges and goes through the predecessors of the latches. At this point, I wonder why llvm allows loops to have multiple latches. There is something good from it? Can we choose only one latch from
multiple latches like closest one to header in domtree please?<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">After detecting the loop from above IR code, If we run LoopSimplify and LICM pass, we can see below output.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">define void @test(i1 %a, i32 %b, i8* noalias %src, i8* noalias %dst) {<o:p></o:p></p>
<p class="MsoNormal">entry:<o:p></o:p></p>
<p class="MsoNormal"> %addr = getelementptr i8, i8* %src, i32 31 -<span style="font-family:Wingdings">à</span> Hoisted<o:p></o:p></p>
<p class="MsoNormal"> br label %while.cond<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">while.cond: ; preds = %while.cond.backedge, %entry<o:p></o:p></p>
<p class="MsoNormal"> br i1 %a, label %while.end6895, label %while.body<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">while.body: ; preds = %while.cond<o:p></o:p></p>
<p class="MsoNormal"> switch i32 %b, label %sw.default6833 [<o:p></o:p></p>
<p class="MsoNormal"> i32 82, label %no_ret<o:p></o:p></p>
<p class="MsoNormal"> i32 30, label %sw.bb4001<o:p></o:p></p>
<p class="MsoNormal"> i32 40, label %while.cond.backedge<o:p></o:p></p>
<p class="MsoNormal"> i32 41, label %while.cond.backedge<o:p></o:p></p>
<p class="MsoNormal"> ]<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">while.cond.backedge: ; preds = %while.body, %while.body, %sw.bb4001<o:p></o:p></p>
<p class="MsoNormal"> br label %while.cond<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">sw.bb4001: ; preds = %while.body<o:p></o:p></p>
<p class="MsoNormal"> %res = load i8, i8* %addr, align 1<o:p></o:p></p>
<p class="MsoNormal"> store i8 %res, i8* %dst, align 1<o:p></o:p></p>
<p class="MsoNormal"> br label %while.cond.backedge<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">sw.default6833: ; preds = %while.body<o:p></o:p></p>
<p class="MsoNormal"> unreachable<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">while.end6895: ; preds = %while.cond<o:p></o:p></p>
<p class="MsoNormal"> unreachable<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">no_ret: ; preds = %while.body<o:p></o:p></p>
<p class="MsoNormal"> ret void<o:p></o:p></p>
<p class="MsoNormal">} <o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">As you can see, the getelementptr instruction is hoisted to the preheader. If the control flow just reaches to the while.body, the gep is just redundant but it is executed at every iteration of the loop. I can see LICM pass checks the instructions
with isSafeToSpeculativelyExecute but it looks like it is not good enough. At this point, I have other question. LICM pass need to consider something for the instructions which are conditionally executed? Rather than just checking safety of unconditional execution
of the instruction.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Additionally, goto statement causes above CFG.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">If there is already something in llvm to handle above case correctly or I missed something, please let me know.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Thanks<o:p></o:p></p>
<p class="MsoNormal">JinGu Kang<o:p></o:p></p>
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