<div dir="ltr"><div class="gmail_quote"><div dir="ltr"><div class="gmail_quote"><div dir="ltr"><span id="m_-2864398774447436606m_-7989899218557045702m_4786963968797231300gmail-m_-3471980215352226228gmail-m_2131210229797738649m_-3548061914227134381gmail-docs-internal-guid-c49371c2-7fff-c557-5906-dee279266a75"><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span style="font-size:11pt">Call for Papers: </span><a href="https://www.computer.org/digital-library/magazines/mi/call-for-papers-special-issue-on-compiling-for-accelerators" target="_blank" style="font-size:11pt"><b>IEEE MICRO Special
Issue on Compiling for Accelerators</b></a><br></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN"> </span></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><b><span lang="EN">Submission
Deadline</span></b><span lang="EN">: December 15, 2021</span></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN"> </span></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><b><span lang="EN">Scope
and Topics</span></b></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN"> </span></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">Hardware accelerators are rapidly becoming a
central architectural feature to improve computation power performance. CPU ISA
extensions, custom-designed engines, and FPGA-based systems have been proposed
as acceleration architectures to improve program execution in scientific,
machine-learning, database, and other application domains. Although much effort
has been devoted to the design of accelerators, there is still a large gap of
knowledge on how to make effective use of and compile for such architectures.
This special issue of IEEE Micro will explore academic and industrial research
on topics that relate to compiling for accelerators. </span></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN"> </span></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">Topics of interest include, but are not
limited to:</span></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN"> </span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Compiling for CPU ISA extensions</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Code generation for neural
processing units</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Compiling for neural network
training</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Programming linear algebra engines</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Code generation and programming
for database accelerators</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Processor-accelerator interface
design and programmability</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Compiling for energy efficiency</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Pattern matching and code
replacement for acceleration instructions</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">High-level synthesis design of
custom engines</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">DSL and parallel programming
models for accelerators</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Compiler intermediate
representation (IR) and optimization techniques for accelerators</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Programming FPGAs for custom
computing engines</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Tools and libraries to support
code generation for accelerators</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN"> </span></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><b><span lang="EN">Important
Dates</span></b></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><b><span lang="EN"> </span></b></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Submission Deadline: December 15,
2021</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Initial notifications: March 15,
2022</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Revised papers due: April 8, 2022</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Final notifications: May 13, 2022</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Final versions due: May 31, 2022</span></p><p class="MsoNormal" style="margin:0cm 0cm 0cm 36pt;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">●<span style="font-variant-numeric:normal;font-variant-east-asian:normal;font-stretch:normal;font-size:7pt;line-height:normal;font-family:"Times New Roman"">
</span></span><span lang="EN">Publication: July/August 2022</span></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN"> </span></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><b><span lang="EN">Submission
Guidelines</span></b></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><b><span lang="EN"> </span></b></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">Please see the <a href="https://www.computer.org/csdl/magazine/mi/write-for-us/14289?title=Author%20Information&periodical=IEEE%20Micro" target="_blank">Author Information page</a> and the <a href="https://www.computer.org/publications/author-resources/peer-review/magazines" target="_blank">Magazine Peer Review page </a>for more
information. Please submit electronically through <a href="https://mc.manuscriptcentral.com/cs-ieee" target="_blank">ScholarOne
Manuscripts</a>, selecting this special-issue option. Submitted
manuscripts must not have been previously published or currently submitted for
publication elsewhere, and all manuscripts must be cleared for publication. All
previously published papers must have at least 30% new content compared to any
conference (or other) publication. </span></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN"> </span></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><b><span lang="EN">Questions?</span></b></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><b><span lang="EN"> </span></b></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">Contact guest editors Guido Araujo and Lucas
Wanner at <a href="mailto:micro4-22@computer.org" target="_blank">micro4-22@computer.org</a>,
or the editor-in-chief Lizy John at <a href="mailto:ljohn@ece.utexas.edu" target="_blank">ljohn@ece.utexas.edu</a>.</span></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN">Please direct ScholarOne-related questions to
the IEEE Micro magazine assistant at <a href="mailto:micro-ma@computer.org" target="_blank">micro-ma@computer.org</a>.</span></p><p class="MsoNormal" style="margin:0cm;line-height:115%;font-size:11pt;font-family:Arial,sans-serif"><span lang="EN"> </span></p><p dir="ltr" style="line-height:1.38;margin-top:0pt;margin-bottom:0pt">
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