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Swell, thanks Sjoerd!<br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Sjoerd Meijer <Sjoerd.Meijer@arm.com><br>
<b>Sent:</b> 04 June 2021 10:19<br>
<b>To:</b> llvm-dev <llvm-dev@lists.llvm.org>; Chandler Carruth <chandlerc@gmail.com>; Thomas Preud'homme <thomasp@graphcore.ai><br>
<b>Subject:</b> Re: Hardware loop and SpeculateAroundPHIs pass</font>
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FWIW, looks related to <a href="https://bugs.llvm.org/show_bug.cgi?id=48821" id="LPlnk308250">https://bugs.llvm.org/show_bug.cgi?id=48821</a>.</div>
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<div id="x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> llvm-dev <llvm-dev-bounces@lists.llvm.org> on behalf of Thomas Preud'homme via llvm-dev <llvm-dev@lists.llvm.org><br>
<b>Sent:</b> 04 June 2021 10:06<br>
<b>To:</b> llvm-dev <llvm-dev@lists.llvm.org>; Chandler Carruth <chandlerc@gmail.com><br>
<b>Subject:</b> [llvm-dev] Hardware loop and SpeculateAroundPHIs pass</font>
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<font size="2"><span style="font-size:11pt">Hi,</span></font></div>
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<font size="2"><span style="font-size:11pt"><br>
</span></font></div>
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<font size="2"><span style="font-size:11pt">We've experienced some regression due to SpeculateAroundPHIs on our non-upstream target: code that used hardware loop is now using a regular branch loop. Apologies for only picking this now, we've only started using
the new pass manager when we merged in the commit that enabled it by default.</span></font></div>
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<font size="2"><span style="font-size:11pt"><br>
</span></font></div>
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<font size="2"><span style="font-size:11pt">An example of what causes us trouble is:<br>
<br>
unsigned KnownDec(unsigned *arr) {<br>
unsigned x = 0x2000;<br>
unsigned z = 0;<br>
while(x) {<br>
z += arr[x-1];<br>
x--;<br>
}<br>
return z;<br>
}<br>
<br>
we get the following IR after the SpeculateAroundPHIs pass:<br>
<br>
entry:<br>
%sub.0 = add nsw i32 2000, -1<br>
br label %while.body<br>
<br>
while.body: ; preds = %while.body.while.body_crit_edge, %entry<br>
%z.07 = phi i32 [ 0, %entry ], [ %add, %while.body.while.body_crit_edge ]<br>
%sub.phi = phi i32 [ %sub.0, %entry ], [ %sub.1, %while.body.while.body_crit_edge ]<br>
%arrayidx = getelementptr inbounds i32, i32* %arr, i32 %sub.phi<br>
%0 = load i32, i32* %arrayidx, align 4, !tbaa !2<br>
%add = add i32 %0, %z.07<br>
%tobool.not = icmp eq i32 %sub.phi, 0<br>
br i1 %tobool.not, label %while.end, label %while.body.while.body_crit_edge, !llvm.loop !6<br>
<br>
while.body.while.body_crit_edge: ; preds = %while.body<br>
%sub.1 = add nsw i32 %sub.phi, -1<br>
br label %while.body<br>
<br>
while.end: ; preds = %while.body<br>
ret i32 %add<br>
<br>
The fact that the condition check is separate from the loop latch means we cannot use a hardware loop instruction. Similar code gets generated for PowerPC if using 0x10000 instead of 2000 but (i) they run EarlyCSE after which sink the value down again in the
PHI and they have a pass to canonicalize the loop form for their addressing mode which
<font size="2"><span style="font-size:11pt">incidentally</span></font> moves the getelementptr from the critical edge (inserted there by the loop strength reduction pass) back into the main loop body. This feels kinda lucky, after all the EarlyCSE and ppc-loop-instr-form-prep
passes were added to the PPC pipeline long before the PHI speculation one.</span></font></div>
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<font size="2"><span style="font-size:11pt"><br>
</span></font></div>
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<font size="2"><span style="font-size:11pt">Is the expectation that targets with hardware loop deal with the result of PHI speculation? If that's the case, could we have a hook for those target to disable the pass when they suspect a hardware loop instruction
might be used?<br>
<br>
Best regards,</span></font></div>
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<font size="2"><span style="font-size:11pt"><br>
</span></font></div>
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<font size="2"><span style="font-size:11pt">Thomas</span></font><br>
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