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<p class="MsoNormal"><span style="font-size:11.0pt">Hey all,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt">It seems that when HardwareLoops calls the isHardwareLoopProfitable TTI hook, it never has a populated AssumptionCache. Some debugging revealed that HardwareLoops runs during the PreISel phase for ARM and
PPC. However, the CodeGenPrepare pass runs before PreISel and removes all assumes meaning that the AssumptionCache in HardwareLoops will end up empty.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt">From what I gather (and let me know if I'm wrong), only PPC uses the AssumptionCache in isHardwareLoopProfitable but only to aid in some cost analysis. I was wondering whether it's intended behaviour to have
an empty AssumptionCache during HardwareLoops? I ask because I was looking into using assumes to persuade HardwareLoops into emitting hardware intrinsics for our (downstream) target.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt">Kind regards,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt">Janek van Oirschot<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt"><o:p> </o:p></span></p>
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