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Hi,
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I have found a bug when passing fixed-length vectors to/from functions in RISC-V. I'm a bit rusty on the CC support in general (let alone on those for RISC-V) so I was hoping for some pointers on how to fix it.</div>
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Take this program:<br>
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<blockquote style="margin-top: 0px; margin-bottom: 0px;"><span style="font-family: "Courier New", monospace;">declare i32 @foo(<4 x i8>)</span>
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<div><span style="font-family: "Courier New", monospace;">define i32 @bar(<4 x i8> %v) {</span></div>
<div><span style="font-family: "Courier New", monospace;"> %r = call i32 @foo(<4 x i8> %v)</span></div>
<div><span style="font-family: "Courier New", monospace;"> ret i32 %r</span></div>
<div><span style="font-family: "Courier New", monospace;">}</span></div>
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And compile with for RV64:</div>
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<span style="font-family: "Courier New", monospace;">$> llc -mtriple riscv64 bug.ll -o - -stop-after finalize-isel</span></div>
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<span style="font-family: "Courier New", monospace;">stack:</span>
<div><span style="font-family: "Courier New", monospace;"> - { id: 0, name: '', type: default, offset: 0,
<b>size: 4, alignment: 4</b>,</span></div>
<div><span style="font-family: "Courier New", monospace;"> stack-id: default, callee-saved-register: '', callee-saved-restored: true,</span></div>
<div><span style="font-family: "Courier New", monospace;"> debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }</span></div>
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<b><span style="font-family: "Courier New", monospace;"> SD killed %4, %stack.0, 24 :: (store 8 into %stack.0)</span></b>
<div><b><span style="font-family: "Courier New", monospace;"> SD killed %3, %stack.0, 16 :: (store 8 into %stack.0)</span></b></div>
<div><b><span style="font-family: "Courier New", monospace;"> SD killed %2, %stack.0, 8 :: (store 8 into %stack.0)</span></b></div>
<div><b><span style="font-family: "Courier New", monospace;"> SD killed %1, %stack.0, 0 :: (store 8 into %stack.0)</span></b></div>
<div><span style="font-family: "Courier New", monospace;"> %5:gpr = ADDI %stack.0, 0</span>
<div><span style="font-family: "Courier New", monospace;"> $x10 = COPY %5</span></div>
<div><span style="font-family: "Courier New", monospace;"> PseudoCALL target-flags(riscv-plt) @foo, csr_ilp32_lp64, implicit-def dead $x1, implicit $x10, implicit-def $x2, implicit-def $x10</span></div>
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You'll notice that the v4i8 parameter has been split into 4 8-byte registers and passed indirectly through the stack as a 32-byte object, but the temporary stack location has been created according to v4i8, whose store size and alignment are both 4 bytes. This
clobbers the stack and will produce misaligned stores.<br>
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Should we be storing these with four SDs but to a 32-byte sized and 8-byte aligned location, or should they be truncating SB stores? I couldn't find the answer in the RISC-V ABI docs.<br>
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Regardless of what we should be doing, I couldn't see that LLVM would currently handle either particularly well. For truncating stores, I couldn't see a way of getting at what would be the "IntermediateVT" (e.g. i8) through ISD::InputArg and ISD::OutputArg
in the backend. For correcting the size & alignment of the stack location, I'm not convinced the issue is only in the RISC-V backend; in SelectionDAGISel::LowerArguments it looks as though it's possible for PartBase to get out of sync when NumValues != 1 &&
VT.getStoreSize() != NumRegs * RegisterVT.getStoreSize(). Is that documented?<br>
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Any pointers on where to take this would be appreciated.<br>
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Thanks,<br>
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<pre class="moz-signature" cols="72"><span style="font-size:10pt">Fraser Cormack</span><span style="font-size:10pt"></span><span style="font-size:10pt"><br>Senior Software Eng</span><span style="font-size:10pt"></span><span style="font-size:10pt">ineer, Compilers</span></pre>
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