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<p class="MsoNormal">Hi all,<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><span lang="EN-US">Can anyone explain how the order of the registers in XXXGenRegisterInfo.inc is determined?<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">E.g. for RISCV:<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">namespace RISCV {<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">enum {<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"> NoRegister,<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"> X0 = 1,<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"> X1 = 2,<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"> // (…)<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"> F31_F = 96,<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"> NUM_TARGET_REGS // 97<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">};<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">}<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">How does this relate to the content of the XXXRegisterInfo.td file? It seems like the enum is generated with the same ordering as the register records appear when running llvm-tblgen.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">I have shuffled with my definitions but don’t seem to be able to influence this order.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"><o:p> </o:p></span></p>
<p class="MsoNormal"><b><span lang="EN-US">Root issue:<o:p></o:p></span></b></p>
<p class="MsoNormal"><span lang="EN-US">My architecture has specific registers for constants, a separate register class. I run a pre-regalloc allocator to allocate constants to registers from that class (because they need to be persistent and not be reused
etc).<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">I can simply ‘MO.setReg(constRegId++)’ in my allocator but then I would need to know the number of the register, which apparently is not the same as the one defined in my XXXRegisterInfo.td file:<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">foreach regid = 447-510 in {<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"> def C#regid : XXXConstReg<regid, "c"#regid, ["c"#regid]>, DwarfRegNum<[regid]>;<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">}<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">If there is a way to get the register range for a certain register class such that I can allocate machine operands to a physical register in that class, then that would solve my issue.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">Mvg Simon de Vegt<o:p></o:p></span></p>
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