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    <p>This sounds very similar to what PowerPC does, see:
<a class="moz-txt-link-freetext" href="https://github.com/llvm/llvm-project/blob/master/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp">https://github.com/llvm/llvm-project/blob/master/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp</a></p>
    <p>However, PowerPC is doing this in the compiler backend, not in
      the assembler. One issue is that the process must be iterative,
      because branches can go both forward and backward, and replacing
      some branch instructions with the branch pairs can then cause
      other branches to go out of range.</p>
    <p> -Hal<br>
    </p>
    <div class="moz-cite-prefix">On 10/5/20 10:20 PM, Kai Wang via
      llvm-dev wrote:<br>
    </div>
    <blockquote type="cite" cite="mid:CAHfQQ_U_rYPnyZKUWxOPb9Kf7jpZMPbt6OpHgPugPBDE5O1rmQ@mail.gmail.com">
      
      <div dir="ltr">
        <div>Correct the title.</div>
        <br>
        <div class="gmail_quote">
          <div dir="ltr" class="gmail_attr">On Tue, Oct 6, 2020 at 11:11
            AM Kai Wang <<a href="mailto:kai.wang@sifive.com" moz-do-not-send="true">kai.wang@sifive.com</a>> wrote:<br>
          </div>
          <blockquote class="gmail_quote" style="margin:0px 0px 0px
            0.8ex;border-left:1px solid
            rgb(204,204,204);padding-left:1ex">
            <div dir="ltr">
              <div>Hi all,</div>
              <div><br>
              </div>
              In RISC-V ISA, the range of conditional branches is within
              4KiB. In current implementation, if the branch target is
              out of range, LLVM MC will issue an error message to tell
              users it could not resolve the fixup record. I have
              compared the result with the GNU assembler. GNU assembler
              will convert the branch to inverted one plus jump to make
              the branch possible. The range of unconditional jump is
              1MiB. It looks like<br>
              <br>
              ##########################<br>
              bne a0, a1, FAR_BRANCH<br>
              …<br>
              FAR_BRANCH:<br>
              <br>
              converted to
              <div><br>
                ##########################<br>
                beq a0, a1, SKIP_J<br>
                j FAR_BRANCH<br>
                SKIP_J:<br>
                …<br>
                FAR_BRANCH:<br>
                <br>
                I found there is a target hook, relaxInstruction, that
                tries to achieve the similar goal. However, the target
                hook only replaces one MCInst with another one with a
                larger branch range. For example, c.beqz will be
                converted to beq in the RISC-V backend if the fixup
                value is out of range. There seems no target hook to
                convert one MCInst to a complex pattern in LLVM MC. Do I
                miss something obvious?<br>
                <br>
                I found there is a target hook, finishLayout, to
                manipulate the code generated. Does it make sense to
                implement the feature in finishLayout? Or is there any
                better idea to achieve the conversion? Thanks a lot.<br>
                <div><br>
                </div>
                <div>Best,</div>
                <div>Kai</div>
              </div>
            </div>
          </blockquote>
        </div>
      </div>
      <br>
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      <pre class="moz-quote-pre" wrap="">_______________________________________________
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</pre>
    </blockquote>
    <pre class="moz-signature" cols="72">-- 
Hal Finkel
Lead, Compiler Technology and Programming Languages
Leadership Computing Facility
Argonne National Laboratory</pre>
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