<div dir="ltr"><div class="gmail_default" style="font-family:arial,helvetica,sans-serif"><div class="gmail_default">Hello Sjoerd,</div><div class="gmail_default"><br></div><div class="gmail_default">Thank you for your response! I was not aware that -Oz is a closer equivalent to GCC's -Os. I tried -Oz when compiling with clang and confirmed that the Clang's generated assembly is equivalent to GCC for the code snippet I posted above.</div><div class="gmail_default"><br></div><div class="gmail_default"><div style="color:rgb(0,0,0);background-color:rgb(255,255,254)"><div><font face="monospace">clang --target=armv6m-none-eabi -Oz -fomit-frame-pointer<br></font></div><div><span style="color:rgb(0,128,128)"><font face="monospace">memcpy_alt1:</font></span></div><div><font face="monospace"> <span style="color:rgb(0,0,255)">push</span> {<span style="color:rgb(72,100,170)">r4</span>, <span style="color:rgb(72,100,170)">lr</span>}</font></div><div><font face="monospace"> <span style="color:rgb(0,0,255)">movs</span> <span style="color:rgb(72,100,170)">r3</span>, <span style="color:rgb(9,134,88)">#0</span></font></div><div><span style="color:rgb(0,128,128)"><font face="monospace">.LBB0_1:</font></span></div><div><font face="monospace"> <span style="color:rgb(0,0,255)">cmp</span> <span style="color:rgb(72,100,170)">r2</span>, <span style="color:rgb(72,100,170)">r3</span></font></div><div><font face="monospace"> <span style="color:rgb(0,0,255)">beq</span> <span style="color:rgb(0,128,128)">.LBB0_3</span></font></div><div><font face="monospace"> <span style="color:rgb(0,0,255)">ldrb</span> <span style="color:rgb(72,100,170)">r4</span>, [<span style="color:rgb(72,100,170)">r1</span>, <span style="color:rgb(72,100,170)">r3</span>]</font></div><div><font face="monospace"> <span style="color:rgb(0,0,255)">strb</span> <span style="color:rgb(72,100,170)">r4</span>, [<span style="color:rgb(72,100,170)">r0</span>, <span style="color:rgb(72,100,170)">r3</span>]</font></div><div><font face="monospace"> <span style="color:rgb(0,0,255)">adds</span> <span style="color:rgb(72,100,170)">r3</span>, <span style="color:rgb(72,100,170)">r3</span>, <span style="color:rgb(9,134,88)">#1</span></font></div><div><font face="monospace"> <span style="color:rgb(0,0,255)">b</span> <span style="color:rgb(0,128,128)">.LBB0_1</span></font></div><div><span style="color:rgb(0,128,128)"><font face="monospace">.LBB0_3:</font></span></div><div><font face="monospace"> <span style="color:rgb(0,0,255)">pop</span> {<span style="color:rgb(72,100,170)">r4</span>, <span style="color:rgb(0,128,128)">pc</span>}</font></div></div></div><div class="gmail_default"><br></div><div><div dir="ltr" class="gmail_signature"><div dir="ltr"><div><div class="gmail_default">On the other hand, -O2 in GCC still uses the register-offset load and store instructions while Clang -O2 generates the same assembly as -Os: immediate-offset (0 offset) load/store followed by incrementing the base register addresses.</div><div class="gmail_default">I have not tried to benchmark the Clang-generated code, it is possible that execution time is bounded by the load and store instructions and memory access latency. From an intuitive view, however, both GCC and Clang are generating code with 1 load and 1 store, so if Clang inserts two additional adds instructions, the binary size is larger, execution <i>could</i> be slower, and there's no improvement in register utilization over GCC.</div><div class="gmail_default"><br></div><div class="gmail_default">I wanted to try a couple other variants of memcpy-like functions. The <a href="https://godbolt.org/z/d7P6rG">https://godbolt.org/z/d7P6rG</a> link includes <font face="monospace">memcpy_alt2</font><font face="arial, helvetica, sans-serif"> which copies data from src to dst starting at the high address and </font><font face="monospace">memcpy_silly</font><font face="arial, helvetica, sans-serif"> which copies </font><font face="monospace">src</font><font face="arial, helvetica, sans-serif"> to </font><font face="monospace">dst<0-4></font><font face="arial, helvetica, sans-serif">. Here is the behavior I have noticed from GCC and Clang.</font></div><div class="gmail_default"><br></div><div class="gmail_default"><b><font face="monospace">memcpy_alt2</font></b></div><div class="gmail_default"><ul><li>With -Os, GCC generates just 6 instructions. -O2 generates 7 but reduces branching to once per loop.</li><li>Clang with -Os or -O2 does a decent job of using a common register to offset the load and store bases. It adds some overhead, though, by pre-decrementing the base registers. 10 instructions generated.</li><li>Clang with -Oz is pathological, generating 13 instructions. It uses register-offset load/store instructions, but uses different registers for the offsets.</li></ul></div><div class="gmail_default"><font face="monospace"><b>memcpy_silly</b></font></div><div class="gmail_default"><ul><li>I created this case to see if clang would select load/store with a common offset register once enough load instructions were added.</li><li>Clang with -Os or -O2 does not seem to care about register-offset load/store and prefers to increment each base register address.</li><li>Clang with -Oz performs the optimization I want. It produces the same number of instructions as GCC, and avoids an issue where GCC has to re-read the same value from the stack each time through the loop.</li></ul><div><br></div><div><font face="arial, helvetica, sans-serif">I really think that, when limited to the Thumb1 ISA, register-offset load and store instructions should be used at -Oz, -Os, and -O2 optimization levels. Explicitly incrementing a register holding the base address seems unnecessary when the value seems wasteful and I cannot see how it will improve execution time in the examples I'm investigating. Id like to know if I'm wrong in assuming that </font><font face="monospace">LDR Rd, [Rn, Rm]</font><font face="arial, helvetica, sans-serif"> and </font><font face="monospace">LDR Rd, [Rn, #<imm>]</font><font face="arial, helvetica, sans-serif"> have the same execution time, but based on the Cortex-M0+ TRM they should both require 2 clock cycles.</font></div><div><br></div><div>Best regards,</div></div></div></div></div></div></div><div><div dir="ltr" data-smartmail="gmail_signature"><div dir="ltr"><div><br></div><div>Daniel Way</div></div></div></div><br></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, Jul 20, 2020 at 6:15 PM Sjoerd Meijer <<a href="mailto:Sjoerd.Meijer@arm.com" target="_blank">Sjoerd.Meijer@arm.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
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<div style="font-family:Calibri,Arial,Helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)">
Hello Daniel,</div>
<div style="font-family:Calibri,Arial,Helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)">
<br>
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<div style="font-family:Calibri,Arial,Helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)">
LLVM and GCC's optimisation levels are not really equivalent. <span style="color:rgb(0,0,0);font-family:Calibri,Arial,Helvetica,sans-serif;font-size:12pt">In Clang, -Os makes a performance and code-size trade off. In GCC, -Os is minimising code-size,
which is equivalent to -Oz with Clang. I have't looked into details yet, but changing -Os to -Oz in the godbolt link gives the codegen you're looking for?</span></div>
<div style="font-family:Calibri,Arial,Helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)">
<br>
</div>
<div style="font-family:Calibri,Arial,Helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)">
Cheers,</div>
<div style="font-family:Calibri,Arial,Helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)">
Sjoerd.</div>
<div id="gmail-m_-6516534409932401643gmail-m_-3127318562264846581appendonsend"></div>
<hr style="display:inline-block;width:98%">
<div id="gmail-m_-6516534409932401643gmail-m_-3127318562264846581divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> llvm-dev <<a href="mailto:llvm-dev-bounces@lists.llvm.org" target="_blank">llvm-dev-bounces@lists.llvm.org</a>> on behalf of Daniel Way via llvm-dev <<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>><br>
<b>Sent:</b> 20 July 2020 06:54<br>
<b>To:</b> <a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a> <<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>><br>
<b>Subject:</b> [llvm-dev] [ARM] Should Use Load and Store with Register Offset</font>
<div> </div>
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<div style="font-family:arial,helvetica,sans-serif">Hello LLVM Community (specifically anyone working with ARM Cortex-M),</div>
<div style="font-family:arial,helvetica,sans-serif"><br>
</div>
<div style="font-family:arial,helvetica,sans-serif">While trying to compile the Newlib C library I found that Clang10 was generating slightly larger binaries than the libc from the prebuilt gcc-arm-none-eabi toolchain. I looked at a
few specific functions (memcpy, strcpy, etc.) and noticed that LLVM does not tend to generate load/store instructions with a register offset (e.g. ldr Rd, [Rn, Rm] form) and instead prefers the immediate offset form.</div>
<div style="font-family:arial,helvetica,sans-serif"><br>
</div>
<div style="font-family:arial,helvetica,sans-serif">When copying a contiguous sequence of bytes, this results in additional instructions to modify the base address. <a href="https://godbolt.org/z/T1xhae" target="_blank">https://godbolt.org/z/T1xhae</a></div>
<div style="font-family:arial,helvetica,sans-serif"><br>
</div>
<div style="font-family:arial,helvetica,sans-serif">
<div style="color:rgb(0,0,0);background-color:rgb(255,255,254);font-family:"Consolas, "">
<div><span style="color:rgb(0,0,255)">void</span>* memcpy_alt1(<span style="color:rgb(0,0,255)">void</span>* dst, <span style="color:rgb(0,0,255)">const</span> <span style="color:rgb(0,0,255)">void</span>* src, size_t len) {</div>
<div> <span style="color:rgb(0,0,255)">char</span>* save = (<span style="color:rgb(0,0,255)">char</span>*)dst;</div>
<div> <span style="color:rgb(0,0,255)">for</span> (size_t i = <span style="color:rgb(9,134,88)">0</span>; i < len; ++i)</div>
<div> *((<span style="color:rgb(0,0,255)">char</span>*)(dst + i)) = *((<span style="color:rgb(0,0,255)">char</span>*)(src + i));</div>
<div> <span style="color:rgb(0,0,255)">return</span> save;</div>
<div>}</div>
<div><br>
</div>
<div>clang --target=armv6m-none-eabi -Os -fomit-frame-pointer</div>
<div>
<div>
<div><span style="color:rgb(0,128,128)">memcpy_alt1:</span></div>
<div> <span style="color:rgb(0,0,255)">push</span> {<span style="color:rgb(72,100,170)">r4</span>, <span style="color:rgb(72,100,170)">lr</span>}</div>
<div> <span style="color:rgb(0,0,255)">cmp</span> <span style="color:rgb(72,100,170)">r2</span>, <span style="color:rgb(9,134,88)">#0</span></div>
<div> <span style="color:rgb(0,0,255)">beq</span> <span style="color:rgb(0,128,128)">.LBB0_3</span></div>
<div> <span style="color:rgb(0,0,255)">mov</span> <span style="color:rgb(72,100,170)">r3</span>, <span style="color:rgb(72,100,170)">r0</span></div>
<div><span style="color:rgb(0,128,128)">.LBB0_2:</span></div>
<div> <span style="color:rgb(0,0,255)">ldrb</span> <span style="color:rgb(72,100,170)">r4</span>, [<span style="color:rgb(72,100,170)">r1</span>]</div>
<div> <span style="color:rgb(0,0,255)">strb</span> <span style="color:rgb(72,100,170)">r4</span>, [<span style="color:rgb(72,100,170)">r3</span>]</div>
<div> <span style="color:rgb(0,0,255)">adds</span> <span style="color:rgb(72,100,170)">r1</span>, <span style="color:rgb(72,100,170)">r1</span>, <span style="color:rgb(9,134,88)">#1</span></div>
<div> <span style="color:rgb(0,0,255)">adds</span> <span style="color:rgb(72,100,170)">r3</span>, <span style="color:rgb(72,100,170)">r3</span>, <span style="color:rgb(9,134,88)">#1</span></div>
<div> <span style="color:rgb(0,0,255)">subs</span> <span style="color:rgb(72,100,170)">r2</span>, <span style="color:rgb(72,100,170)">r2</span>, <span style="color:rgb(9,134,88)">#1</span></div>
<div> <span style="color:rgb(0,0,255)">bne</span> <span style="color:rgb(0,128,128)">.LBB0_2</span></div>
<div><span style="color:rgb(0,128,128)">.LBB0_3:</span></div>
<div> <span style="color:rgb(0,0,255)">pop</span> {<span style="color:rgb(72,100,170)">r4</span>, <span style="color:rgb(0,128,128)">pc</span>}</div>
</div>
</div>
<div><br>
</div>
<div>arm-none-eabi-gcc -march=armv6-m -Os</div>
<div>
<div>
<div><span style="color:rgb(0,128,128)">memcpy_alt1:</span></div>
<div> <span style="color:rgb(0,0,255)">movs</span> <span style="color:rgb(72,100,170)">r3</span>, <span style="color:rgb(9,134,88)">#0</span></div>
<div> <span style="color:rgb(0,0,255)">push</span> {<span style="color:rgb(72,100,170)">r4</span>, <span style="color:rgb(72,100,170)">lr</span>}</div>
<div><span style="color:rgb(0,128,128)">.L2:</span></div>
<div> <span style="color:rgb(0,0,255)">cmp</span> <span style="color:rgb(72,100,170)">r3</span>, <span style="color:rgb(72,100,170)">r2</span></div>
<div> <span style="color:rgb(0,0,255)">bne</span> <span style="color:rgb(0,128,128)">.L3</span></div>
<div> <span style="color:rgb(0,0,255)">pop</span> {<span style="color:rgb(72,100,170)">r4</span>, <span style="color:rgb(0,128,128)">pc</span>}</div>
<div><span style="color:rgb(0,128,128)">.L3:</span></div>
<div> <span style="color:rgb(0,0,255)">ldrb</span> <span style="color:rgb(72,100,170)">r4</span>, [<span style="color:rgb(72,100,170)">r1</span>, <span style="color:rgb(72,100,170)">r3</span>]</div>
<div> <span style="color:rgb(0,0,255)">strb</span> <span style="color:rgb(72,100,170)">r4</span>, [<span style="color:rgb(72,100,170)">r0</span>, <span style="color:rgb(72,100,170)">r3</span>]</div>
<div> <span style="color:rgb(0,0,255)">adds</span> <span style="color:rgb(72,100,170)">r3</span>, <span style="color:rgb(72,100,170)">r3</span>, <span style="color:rgb(9,134,88)">#1</span></div>
<div> <span style="color:rgb(0,0,255)">b</span> <span style="color:rgb(0,128,128)">.L2</span></div>
</div>
</div>
</div>
</div>
<div style="font-family:arial,helvetica,sans-serif"><br>
</div>
<div style="font-family:arial,helvetica,sans-serif">Because this code appears in a loop that could be copying hundreds of bytes, I want to add an optimization that will prioritize load/store instructions with register offsets when the
offset is used multiple times. I have not worked on LLVM before, so I'd like advice about where to start.</div>
<div>
<ul style="font-family:arial,helvetica,sans-serif">
<li>The generated code is correct, just sub-optimal so is it appropriate to submit a bug report?</li><li>Is anyone already tackling this change or is there someone with more experience interested in collaborating?</li><li>Is this optimization better performed early during instruction selection or late using c++ (i.e. ARMLoadStoreOptimizer.cpp)</li><li>What is the potential to cause harm to other parts of the code gen, specifically for other arm targets. I'm working with armv6m, but armv7m offers base register updating in a single instruction. I don't want to break other useful optimizations.</li></ul>
<div style="font-family:arial,helvetica,sans-serif">So far, I am reading through the LLVM documentation to see where a change could be applied. I have also:</div>
<div>
<ul>
<li style="font-family:arial,helvetica,sans-serif">Compiled with -S -emit-llvm (see Godbolt link)<br>
There is an identifiable pattern where a getelementptr function is followed by a load or store. When multiple getelementptr functions appear with the same virtual register offset, maybe this should match a tLDRr or tSTRr.</li><li><font face="arial, helvetica, sans-serif">Ran LLC with </font>--print-machineinstrs <br>
It appears that tLDRBi and tSTRBi are selected very early and never replaced by the equivalent t<LDRB|STRB>r instructions.</li></ul>
<div>Thank you,</div>
</div>
</div>
<div style="font-family:arial,helvetica,sans-serif"><br>
</div>
<div>
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<div dir="ltr">
<div>Daniel Way</div>
</div>
</div>
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</blockquote></div>