<div dir="auto">Thanks Hal,<div dir="auto"><br></div><div dir="auto">The front-end question is still a tricky one. Having a low level CDFG in MLIR doesnt really offer much and I see rebuilding the clang code generator to emit loops directly in MLIR as a complex piece of work. I think the most natural place to interact with Vivado HLS is towards the backend at the moment where MLIR could give more points of interaction late in the HLS flow. Eventually the community will sort out the front-end questions do tackling that hasn't been high on my list. Simply rebuilding HLS flows is also not necessarily the goal here, although it's a natural place to start. From a Xilinx perspective we also have heterogeneous devices with lots of vector VLIW cores. Integrating them into an HLS-like flow is also very interesting.</div><div dir="auto"><br></div><div dir="auto">Steve</div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Sun, Jul 5, 2020, 8:28 AM Hal Finkel <<a href="mailto:hfinkel@anl.gov">hfinkel@anl.gov</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div>
<p>Hi, Steve,</p>
<p>I think it would be great to have hardware-synthesis capabilities
in the LLVM project. The incubation process discussion may be
ongoing, but as that settles, this seems like a good candidate to
me.</p>
<p>Out of curiosity, many existing HLS tools use C/C++-derived input
languages, and as Clang produces LLVM, do you have any plans for a
converter between LLVM and your MLIR dialects? Or are you just
targeting other kinds of frontends?</p>
<p>Thanks again,</p>
<p>Hal<br>
</p>
<div>On 7/4/20 5:29 PM, Stephen Neuendorffer
via llvm-dev wrote:<br>
</div>
<blockquote type="cite">
<div dir="ltr"><span id="m_-3788029812512446125gmail-docs-internal-guid-74a8d807-7fff-8a08-78b6-99bcf7722c77"></span><br>
<div><span style="background-color:transparent;color:rgb(0,0,0);font-family:Arial;font-size:11pt;white-space:pre-wrap">For the past several months, members of the ‘CIRCT’ group have been working to begin adapting MLIR for hardware design. We believe that this area would benefit from good open source infrastructure enabling research and, eventually, the next generation of commercial tools. We have collected several dialects and envision a number of lowering flows using these dialects. We have reached the point where we are ready to share our ideas more widely and would like to be considered as an LLVM incubator project.</span><br>
</div>
<div><span style="font-size:11pt;font-family:Arial;color:rgb(0,0,0);background-color:transparent;font-variant-numeric:normal;font-variant-east-asian:normal;vertical-align:baseline;white-space:pre-wrap">
Our code exists at </span><a href="https://github.com/circt" style="text-decoration-line:none" target="_blank" rel="noreferrer"><span style="font-size:11pt;font-family:Arial;background-color:transparent;font-variant-numeric:normal;font-variant-east-asian:normal;text-decoration-line:underline;vertical-align:baseline;white-space:pre-wrap">https://github.com/circt</span></a><span style="font-size:11pt;font-family:Arial;color:rgb(0,0,0);background-color:transparent;font-variant-numeric:normal;font-variant-east-asian:normal;vertical-align:baseline;white-space:pre-wrap"> as an out-of-tree MLIR project and our group charter can be found at </span><a href="https://github.com/circt/circt/blob/master/README.md" style="text-decoration-line:none" target="_blank" rel="noreferrer"><span style="font-size:11pt;font-family:Arial;background-color:transparent;font-variant-numeric:normal;font-variant-east-asian:normal;text-decoration-line:underline;vertical-align:baseline;white-space:pre-wrap">https://github.com/circt/circt/blob/master/README.md</span></a><span style="font-size:11pt;font-family:Arial;color:rgb(0,0,0);background-color:transparent;font-variant-numeric:normal;font-variant-east-asian:normal;vertical-align:baseline;white-space:pre-wrap">. We have weekly discussions with a group of about 20 people from Xilinx, SiFive, Microsoft, PNNL, ETH Zurich, EPFL, Stanford, and Cornell, and welcome additional contributions. This project is still early and we see many elements as highly experimental. At the same time, we feel that the only way to vet these ideas is to build larger systems which will likely take some time and community investment. The LLVM incubator process would be a good way to help us organize this effort.</span></div>
<div><br>
</div>
<div>Steve Neuendorffer</div>
<div>Xilinx Research Labs <span><span style="font-size:11pt;font-family:Arial;color:rgb(0,0,0);background-color:transparent;font-variant-numeric:normal;font-variant-east-asian:normal;vertical-align:baseline;white-space:pre-wrap">
</span></span></div>
</div>
<br>
<fieldset></fieldset>
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</pre>
</blockquote>
<pre cols="72">--
Hal Finkel
Lead, Compiler Technology and Programming Languages
Leadership Computing Facility
Argonne National Laboratory</pre>
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</blockquote></div>