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<pre><span style="color:black">Refine and resend it. Hope it’s more readable.<o:p></o:p></span></pre>
<pre><span style="color:black"><o:p> </o:p></span></pre>
<pre><span style="color:black">Hi all,<o:p></o:p></span></pre>
<pre><span style="color:black"><o:p> </o:p></span></pre>
<pre><span style="color:black">I'd like to discuss about the LLVM SW mitigation to Jump Conditional Code Erratum in this mailing thread. The patch was submitted in phabricator <a href="https://reviews.llvm.org/D70157.">https://reviews.llvm.org/D70157.</a> There were many review comments about its performance/code size impact, and some suggestions how to make the patches more generic to apply to other scenarios.<o:p></o:p></span></pre>
<pre><span style="color:black"><o:p> </o:p></span></pre>
<pre><span style="color:black">Let's start from the performance/code size/build time impact. Below is the data we got from the test suite.<o:p></o:p></span></pre>
<pre><span style="color:black">LLVM test-suite Baseline sw_prefix hw hw_sw_prefix<o:p></o:p></span></pre>
<pre><span style="color:black">compile_time 0.276 0.282 0.276 0.282<o:p></o:p></span></pre>
<pre><span style="color:black">exec_time 286.465 285.017 291.294 287.766<o:p></o:p></span></pre>
<pre><span style="color:black">code_size 3.868 3.889 3.868 3.889<o:p></o:p></span></pre>
<pre><span style="color:black"><o:p> </o:p></span></pre>
<pre><span style="color:black">LLVM test-suite Baseline sw_prefix hw hw_sw_prefix<o:p></o:p></span></pre>
<pre><span style="color:black">compile_time 1.000 1.021 1.000 1.021<o:p></o:p></span></pre>
<pre><span style="color:black">exec_time 1.000 0.995 1.017 1.005<o:p></o:p></span></pre>
<pre><span style="color:black">code_size 1.000 1.005 1.000 1.005<o:p></o:p></span></pre>
<pre><span style="color:black"><o:p> </o:p></span></pre>
<pre><span style="color:black">Test date:<o:p></o:p></span></pre>
<pre><span style="color:black"> 2019/11/25<o:p></o:p></span></pre>
<pre><span style="color:black"><o:p> </o:p></span></pre>
<pre><span style="color:black">System Configuration:<o:p></o:p></span></pre>
<pre><span style="color:black">OS: Red Hat* 8.0 x86_64<o:p></o:p></span></pre>
<pre><span style="color:black">Memory: 191 GB<o:p></o:p></span></pre>
<pre><span style="color:black">CPUCount: 2<o:p></o:p></span></pre>
<pre><span style="color:black">CoreCount: 40<o:p></o:p></span></pre>
<pre><span style="color:black">Intel HyperThreading: yes<o:p></o:p></span></pre>
<pre><span style="color:black">CPU Model: Intel(R) Xeon(R) Gold 6148 CPU @ 2.40GHz<o:p></o:p></span></pre>
<pre><span style="color:black">Microcode w/o hw mitigation: 0x200005e<o:p></o:p></span></pre>
<pre><span style="color:black">Microcode with hw mitigation: 0x2000063<o:p></o:p></span></pre>
<pre><span style="color:black"><o:p> </o:p></span></pre>
<pre><span style="color:black"> 1. Baseline means the system w/o MCU mitigation and w/o SW mitigation.<o:p></o:p></span></pre>
<pre><span style="color:black"> 2. SW_prefix means prefix mitigation is applied to a Non MCU system.<o:p></o:p></span></pre>
<pre><span style="color:black"> 3. HW means the MCU mitigation is applied w/o SW mitigation.<o:p></o:p></span></pre>
<pre><span style="color:black"> 4. HW+SW means both MCU and prefix mitigations are applied.<o:p></o:p></span></pre>
<pre><span style="color:black"> 5. The data in 2nd table is normalized as the ratio vs. baseline. The smaller the better.<o:p></o:p></span></pre>
<pre><span style="color:black"> 6. The test is done on an engineering build plus the SW mitigation patch. It may be variant from build to build.<o:p></o:p></span></pre>
<pre><span style="color:black"><o:p> </o:p></span></pre>
<pre><span style="color:black">The data indicates that there's some performance penalty (1.7%) in HW mitigation. And it reduced to 0.5% with prefix mitigated. The code size increase in test suite is about 0.5%. And the compile time increase is about 2%.<o:p></o:p></span></pre>
<pre><span style="color:black"><o:p> </o:p></span></pre>
<pre><span style="color:black">More data will follow.<o:p></o:p></span></pre>
<pre><span style="color:black"><o:p> </o:p></span></pre>
<pre><span style="color:black">Thanks,<o:p></o:p></span></pre>
<pre><span style="color:black">Annita<o:p></o:p></span></pre>
<pre><span style="color:black"><o:p> </o:p></span></pre>
<pre><span style="color:black">For more complete information about performance and benchmark results, visit www.intel.com/benchmarks<<a href="http://www.intel.com/benchmarks">http://www.intel.com/benchmarks</a>>. For specific information and notices/disclaimers regarding the Jump Conditional Code Erratum, visit <a href="https://www.intel.com/content/dam/support/us/en/documents/processors/mitigations-jump-conditional-code-erratum.pdf.">https://www.intel.com/content/dam/support/us/en/documents/processors/mitigations-jump-conditional-code-erratum.pdf.</a><o:p></o:p></span></pre>
<pre><span style="color:black"><o:p> </o:p></span></pre>
<pre><span style="color:black"><o:p> </o:p></span></pre>
<pre><span style="color:black"><o:p> </o:p></span></pre>
<pre><span style="color:black"><o:p> </o:p></span></pre>
<p class="MsoNormal"><o:p> </o:p></p>
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