<div dir="ltr"><div><div dir="auto">I think it’s disallowed by the SDTypeProfile in TargetSelectionDAG.td. You can use vector_extract instead of extractelt which is what some other targets like WebAssembly are doing for this issue. It's type profile is more relaxed on this.</div></div><div dir="auto"><br></div></div><div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Thu, Nov 28, 2019 at 8:51 AM Sebastien Le Duc via llvm-dev <<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div><div style="font-family:arial,helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)"><div><div style="font-family:arial,helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)"><div>Hi,</div><div>I have an issue with pattern matching.</div><div> </div><div>I have the following SelectionDAG:</div><div><pre style="font-style:normal;font-variant-caps:normal;font-weight:400;letter-spacing:normal;text-indent:0px;text-transform:none;word-spacing:0px;text-decoration-style:initial;text-decoration-color:initial;box-sizing:inherit;margin:4px 0px;padding:8px;text-align:left;font-family:Monaco,Menlo,Consolas,"Courier New",monospace">t13: i32 = extract_vector_elt t2, Constant:i64<1><br><br>That I am trying to match with the following pattern:<br><br></pre></div><pre style="box-sizing:inherit;margin:4px 0px;padding:8px;font-size:12px;line-height:1.50001;font-variant-ligatures:none;white-space:pre-wrap;word-break:normal;border-radius:4px;color:rgb(29,28,29);font-style:normal;font-variant-caps:normal;font-weight:400;letter-spacing:normal;text-align:left;text-indent:0px;text-transform:none;word-spacing:0px;text-decoration-style:initial;text-decoration-color:initial;font-family:Monaco,Menlo,Consolas,"Courier New",monospace">def : Pat<(extractelt (v4i16 SingleReg:$v), 1), (SRADd1 SingleReg :$v, (i64 16))>;</pre></div><div style="font-family:arial,helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)"><br></div><div style="font-family:arial,helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)">But for some reason the pattern does not match.</div><div style="font-family:arial,helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)">It seems to be  due to the fact extract_vector_elt's result type is i32 (because i16 is not a legal type on our processor), but according to the comment in ISDOpcodes.h, it is allowed for EXTRACT_VECTOR_ELT to have a result type larger than the element type of the vector, so I would expect to be able to match such pattern.</div><div style="font-family:arial,helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)"><br></div><div style="font-family:arial,helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)">I tried specifying the result type in the pattern:</div><div style="font-family:arial,helvetica,sans-serif;font-size:12pt;color:rgb(0,0,0)"><pre style="font-style:normal;font-variant-caps:normal;font-weight:400;letter-spacing:normal;text-indent:0px;text-transform:none;word-spacing:0px;text-decoration-style:initial;text-decoration-color:initial;box-sizing:inherit;margin:4px 0px;padding:8px;font-size:12px;line-height:1.50001;font-variant-ligatures:none;white-space:pre-wrap;word-break:normal;border-radius:4px;color:rgb(29,28,29);text-align:left;font-family:Monaco,Menlo,Consolas,"Courier New",monospace">def : Pat<(i32 (extractelt (v4i16 SingleReg:$v), 1)), (SRADd1 SingleReg :$v, (i64 16))>;</pre> <br></div>But in that case I get a tblgen error:</div><div><br></div><div><div style="box-sizing:inherit;margin-right:20px;min-width:1px;margin-left:64px;color:rgb(29,28,29);font-family:Slack-Lato,appleLogo,sans-serif;font-size:15px;font-style:normal;font-variant-ligatures:common-ligatures;font-variant-caps:normal;font-weight:400;letter-spacing:normal;text-align:start;text-indent:0px;text-transform:none;white-space:normal;word-spacing:0px;text-decoration-style:initial;text-decoration-color:initial"><div style="box-sizing:inherit;max-width:none"><div style="box-sizing:inherit;margin-top:0px;width:1616px"><div style="box-sizing:inherit;display:flex"><div dir="auto" style="box-sizing:inherit;width:1616px;white-space:pre-wrap;text-align:left;font-size:15px;line-height:1.46668"><div style="box-sizing:inherit">possible type contradiction in the pattern below (use -print-records with llvm-tblgen to see all expanded records).<br style="box-sizing:inherit">anonymous_1188: (extractelt:{ *:[] } SingleReg:{ *:[] }:$v, 0:{ *:[i64] })</div><div style="box-sizing:inherit"><br></div><div style="box-sizing:inherit">Is there anyway to match such pattern? </div><div style="box-sizing:inherit"><br></div><div style="box-sizing:inherit">Thanks in advacne!</div><div style="box-sizing:inherit">regards,</div><div style="box-sizing:inherit">Sebastien</div><div style="box-sizing:inherit;text-align:left"><br></div></div></div></div></div></div><div style="box-sizing:inherit;display:blo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