<html><head><meta http-equiv="content-type" content="text/html; charset=utf-8"></head><body dir="auto"><div dir="ltr">The MC layer doesn’t have passes. There is a method called emitIntruction() which is called one by one to create the MCInst. </div><div dir="ltr"><br></div><div dir="ltr">In the past I have accomplished what you’d like by overloading the methods in ObjectStreamer to buffer all the MCInst for a function. Then doing analysis on the buffered instructions.</div><div dir="ltr"><br></div><div dir="ltr">Here’s a link about how instructions are lowered which might shed some light on how all this works.</div><div dir="ltr"><br></div><div dir="ltr"><a href="https://eli.thegreenplace.net/2012/11/24/life-of-an-instruction-in-llvm">https://eli.thegreenplace.net/2012/11/24/life-of-an-instruction-in-llvm</a></div><div dir="ltr"><br></div><div dir="ltr"><br></div><div dir="ltr"><br><blockquote type="cite">On Nov 27, 2019, at 5:51 AM, Lele Ma <lelema.cn@gmail.com> wrote:<br><br></blockquote></div><blockquote type="cite"><div dir="ltr"><div dir="ltr"><div>Hi All,</div><div><br></div><div>A self-follow up and rephrase of my previous question with updated subject:</div><div><br></div><div>What I want to do is to analyze hand-written assembly code with 'full details' where semantics of each instruction can be known in LLVM passes. Many of such instructions have no corresponding counterparts in IR/MIR forms, such as 'syscall' 'iret', etc. At MC level, such assembly code can be translated to MCInst easily since this level is closest to the assembly code. Therefore, I am thinking to write a pass at MC level instead of IR/MIR.<br></div><div><br></div><div>However, when I am searching to learn the MC level passes, I cannot find any related classes in LLVM infrastructure (such as FunctionPass at IR level; MachineFunctionPass at MIR pass). Could anyone direct me where I should start to write a MC level pass?</div><div><br></div><div>Best Regards,</div><div>Lele<br></div><div><br></div><div><br></div><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, Nov 25, 2019 at 5:24 PM Lele Ma <<a href="mailto:lelema.cn@gmail.com">lelema.cn@gmail.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div dir="ltr"><div>Thank you for the instructions, Aaron and Nicolai!</div><div><br></div><div>Raising a binary to LLVM IR, or raising to MIR is a reasonable solution for me. However, given Nicolai's information that not all target-specific instructions are representable in MIR, I got two questions that need your help:</div><div><br></div><div>1. Why MIR does not necessarily represent all target specific instructions for certain hardware? If someone added those support, will this violate some design principles of MIR?</div><div><br></div><div>2. Instead of IR/MIR raising, I am wondering whether a third path is possible to solve the problem of analyzing assembly code:</div><div><b> - write simple LLVM pass in the `MC` layer to process information not available in MIR/IR and </b></div><div><b> - passing analysis result from IR/MIR pass to the MC layer pass where we can enhance the result with missing representations.</b></div><div>So the second question is whether it is possible to write passes directly in the MC layer? If so, is there any documentation or example for that?<br></div><div><br></div><div><br></div><div>Thank you in advance!</div><div><br></div><div>Best Regards,</div><div>Lele</div><div><br></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, Nov 25, 2019 at 9:15 AM Aaron Smith <<a href="mailto:aaron.lee.smith@gmail.com" target="_blank">aaron.lee.smith@gmail.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div dir="ltr"><div dir="ltr">Llvm-mctoll will raise a binary back to LLVM IR. <div>Not exactly what you want but it might be something you can leverage.</div><div><br></div><div><a href="https://github.com/microsoft/llvm-mctoll" target="_blank">https://github.com/microsoft/llvm-mctoll</a> </div></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, Nov 25, 2019 at 1:19 PM Nicolai Hähnle via llvm-dev <<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On Thu, Nov 21, 2019 at 3:37 AM Lele Ma via llvm-dev<br>
<<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>> wrote:<br>
> My goal is to write LLVM Machine IR (MIR) passes to analyze the assembly source code. But it seems I need to find a way to translate the handwritten assembly code into MIR format first.<br>
><br>
> Is there any materials, or any modules in LLVM source code, that can help to translate assembly code into LLVM MIR for analysis?<br>
><br>
> Or is there any easier ways to analyze assembly code in MIR passes without translating it?<br>
<br>
MachineIR is designed for code generation, not for general assembly<br>
representation. MIR is even not necessarily able to represent all<br>
assembly instructions that a target's hardware supports. The<br>
disassembler produces MCInsts, and if you wanted to go from there back<br>
to MachineIR, you'd have to write your own target-specific code to do<br>
so.<br>
<br>
Cheers,<br>
Nicolai<br>
<br>
<br>
<br>
><br>
> Best Regards,<br>
> Lele Ma<br>
><br>
><br>
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aber vergiss niemals, wie sie sein sollte.<br>
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