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I've remembered another two other features I wished for recently.</div>
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1) The first one is forward variable reference. This would allow to match loops, e.g.</div>
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CHECK: [[LOOPLABEL:.[[:alpha:]][[:alnum:]]*]]</div>
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(...) // CHECK-NEXT for instructions in the loop<br>
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CHECK: bne $r0 [[LOOPLABEL]]</div>
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This would require variable names to not be redefinable which I think would be a good default at least within a CHECK-LABEL block to make test clearer and unambiguous.</div>
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2) The second feature is the ability to use variables in regular expressions. This allows to check for instructions that could either take an immediate or reuse a register that has the right value when both are acceptable approaches:</div>
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CHECK: add r0, {{(18|[[REG]])}}</div>
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The problem is how to encode this in the syntax since that would deviate from the posix regex syntax. That would probably mean using a different syntax than {{}} to indicate the use of that extended regex syntax.</div>
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A potential follow-up which I've never needed personally but I can see the use for is optional CHECK which would allow to write:</div>
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CHECK-OPT: mov [[REG:r[0-9]+]], 18</div>
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CHECK: add r0, {{(18|[[REG]])}}</div>
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to allow to check for an addition with a constant which is either loaded into a register or encoded in an immediate field. This could be useful if the add with immediate is a bigger encoding than the register version in which case the immediate makes sense
in case of single use of the value and the register is better in case of multiple use. As I said, this optional CHECK is not a feature I've personally needed, so it's not on my wishlist.</div>
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Best regards,</div>
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Thomas<br>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" face="Calibri, sans-serif" color="#000000"><b>From:</b> llvm-dev <llvm-dev-bounces@lists.llvm.org> on behalf of Thomas Preud'homme via llvm-dev <llvm-dev@lists.llvm.org><br>
<b>Sent:</b> 23 October 2019 03:01<br>
<b>To:</b> llvm-dev <llvm-dev@lists.llvm.org><br>
<b>Subject:</b> [llvm-dev] FileCheck wishlist</font>
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Hi,</div>
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I'm looking for some feedback on pain points people have with FileCheck in terms of missing features to help people interested in working on FileCheck to prioritize the work accordingly. I am personally interested in improving FileCheck on 2 issues whenever
time permits it:<br>
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<li>being able to test for consecutive lines in arbitrary order, i.e. something akin to CHECK-DAG blocks where all lines matched are consecutive</li><li>DAG regions to be able to look for sequences of code that can be interleaved, which would be useful to check for register dependencies accross several operands, e.g. allowing all valid interleaving of instructions in the following sequence:<br>
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load rA, [rT]<br>
load rB, [rX]<br>
load rC, [rY]<br>
load rD, [rZ]<br>
mul rF, rA, rB<br>
mul rG, rC, rD<br>
add rH, rF, rG</li></ul>
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I would therefore like to be able to define two sequences each composed of 2 loads in any order (thus using the solution for the first issue) followed by a mul that can be interleaved between each other which are followed by an add.</div>
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Do people have any other wishlist item? I propose to compile a list of all suggestions and do a poll to get an idea of what features seems to be the most wanted. This can then be used by whoever is interested in contributed to FileCheck to maximize the impact
of their contribution, myself included.</div>
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Best regards,</div>
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Thomas<br>
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