<div dir="ltr">SelectionDAG can't have control flow. For X86 we match selects on old CPUs or on types that don't support cmov to pseudo cmov instructions during isel. Those cmov instructions are marked as "UsesCustomInserter" in the InstrInfo td files. X86TargetLowering::EmitInstrWithCustomInserter will then expand those pseudo instructions into control flow by creating new MachineBasicBlocks and branches. Most of that code is in X86TargetLowering::EmitLoweredSelect.<div><br></div><div><br clear="all"><div><div dir="ltr" class="gmail_signature" data-smartmail="gmail_signature">~Craig</div></div><br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Fri, Oct 11, 2019 at 4:20 PM s.ignatov via llvm-dev <<a href="mailto:llvm-dev@lists.llvm.org">llvm-dev@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Hello,<br>
<br>
We have the architecture without conditional moves. Which way can we <br>
lower select?<br>
<br>
As we know there was the special pass a long time ago, but it was deleted.<br>
<br>
commit c3591a0d48ce045bbf5ae0d78a41f3dae4bb99db<br>
Author: Chris Lattner <<a href="mailto:sabre@nondot.org" target="_blank">sabre@nondot.org</a>><br>
Date: Tue Feb 19 07:49:17 2008 +0000<br>
<br>
remove the LowerSelect pass. The last client was the old Sparc <br>
backend, which is long dead by now.<br>
<br>
llvm-svn: 47323<br>
<br>
The problem is that if we use this pass we lose some useful special <br>
optimizing cases for selects, e.g. replacing it by min/max.<br>
<br>
Does anyone have some experience with such architecture?<br>
<br>
We're trying to generate some "if-then-else" on SelectionDAG now.<br>
<br>
Could anyone show the way to generate "if-then-else" constructs on <br>
SelectionDAG?<br>
<br>
Thanks in advance,<br>
<br>
Sergey.<br>
<br>
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</blockquote></div>