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<p class="MsoNormal">Hi David,<br>
I indeed forgot to cc the list.<o:p></o:p></p>
<p class="MsoNormal">The last time I’ve checked the scheduling/tracking of debug values was done in a best-effort way by simply “remembering” all consecutive dbg instructions that followed some other instruction in
<span class="pl-en">ScheduleDAGInstrs::buildSchedGraph. This works for most cases but sometimes it can produce wrong debug info by rescheduling unrelated instructions (or not scheduling the related ones) since, IRC, it’s perfectly valid to have something like<o:p></o:p></span></p>
<p class="MsoNormal"><span class="pl-en"><o:p> </o:p></span></p>
<p class="MsoNormal"><span class="pl-en">R1 = …<o:p></o:p></span></p>
<p class="MsoNormal"><span class="pl-en">DEBUG_VALUE R1, ...<o:p></o:p></span></p>
<p class="MsoNormal"><some instruction that doesn’t touch R1><o:p></o:p></p>
<p class="MsoNormal"><span class="pl-en">DEBUG_VALUE R1, <same as above><o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">And for this example if the first instruction is moved , the first dbg value would be moved as well (as it should) while second one will stay after the second instruction (which would produce wrong dbg info at that point).<br>
If there was a way to properly associate each instruction with all affected dbg_values whether they are, it could solve this problem, although there might be other approaches as well.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">--<o:p></o:p></p>
<p class="MsoNormal">Danila<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal"><b>From:</b> David Tellenbach [mailto:David.Tellenbach@arm.com]
<br>
<b>Sent:</b> Saturday, October 5, 2019 17:14<br>
<b>To:</b> Danila Malyutin <Danila.Malyutin@synopsys.com>; paul.robinson@sony.com<br>
<b>Cc:</b> nd <nd@arm.com><br>
<b>Subject:</b> Re: [AArch64] Generated assembly differs depending on whether debug information is generated or not<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Hi Danila,<o:p></o:p></span></p>
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<p class="MsoNormal"><span style="font-size:12.0pt;color:black"><o:p> </o:p></span></p>
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<p class="MsoNormal"><span style="font-size:12.0pt;color:black">sorry for not responding to this. Was this message meant to go to the mailing list? If so, you probably forgot to CC llvm-dev. Feel free to forward my answer to the list.<o:p></o:p></span></p>
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<p class="MsoNormal"><span style="color:#201F1E;background:white">Step #3 would also likely allow to solve some corner cases where incorrect debug info is generated due to some DEBUG_VALUE or similar becoming stale after corresponding instruction has been rescheduled.</span><span style="font-size:12.0pt;color:#666666"><o:p></o:p></span></p>
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<p class="MsoNormal"><span style="font-size:12.0pt;color:#201F1E">If I see it correctly exactly this is currently already done for debug values but not for CFI instructions. My current implementation of 3 works very similar to the current implementation for
debug values.</span><o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal"><span style="color:#201F1E"> </span><span style="font-size:12.0pt;color:#201F1E">David</span><o:p></o:p></p>
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<p class="MsoNormal"><b><span style="color:black">From:</span></b><span style="color:black"> Danila Malyutin <<a href="mailto:Danila.Malyutin@synopsys.com">Danila.Malyutin@synopsys.com</a>><br>
<b>Sent:</b> 27 September 2019 15:33<br>
<b>To:</b> <a href="mailto:paul.robinson@sony.com">paul.robinson@sony.com</a> <<a href="mailto:paul.robinson@sony.com">paul.robinson@sony.com</a>>; David Tellenbach <<a href="mailto:David.Tellenbach@arm.com">David.Tellenbach@arm.com</a>><br>
<b>Cc:</b> nd <<a href="mailto:nd@arm.com">nd@arm.com</a>><br>
<b>Subject:</b> RE: [AArch64] Generated assembly differs depending on whether debug information is generated or not</span>
<o:p></o:p></p>
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<p class="MsoNormal"> <o:p></o:p></p>
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<p class="xmsonormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">Hi,</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> </span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">Step #3 would also likely allow to solve some corner cases where incorrect debug info is generated due to some DEBUG_VALUE or similar becoming stale after corresponding instruction
has been rescheduled.</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> </span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">--</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">Danila</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> </span><o:p></o:p></p>
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<p class="xmsonormal"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> llvm-dev [<a href="mailto:llvm-dev-bounces@lists.llvm.org">mailto:llvm-dev-bounces@lists.llvm.org</a>]
<b>On Behalf Of </b>via llvm-dev<br>
<b>Sent:</b> Thursday, September 26, 2019 15:56<br>
<b>To:</b> <a href="mailto:David.Tellenbach@arm.com">David.Tellenbach@arm.com</a><br>
<b>Cc:</b> <a href="mailto:llvm-dev@lists.llvm.org">llvm-dev@lists.llvm.org</a>; <a href="mailto:nd@arm.com">
nd@arm.com</a><br>
<b>Subject:</b> Re: [llvm-dev] [AArch64] Generated assembly differs depending on whether debug information is generated or not</span><o:p></o:p></p>
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<p class="xmsonormal"> <o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Hi David,</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">This is PR37240 (<a href="https://urldefense.proofpoint.com/v2/url?u=https-3A__bugs.llvm.org_show-5Fbug.cgi-3Fid-3D37240&d=DwMFAg&c=DPL6_X_6JkXFx7AXWqB0tg&r=YgdxWMcdqQPlU9EdetI-xI79G7ouw9_Us0dFsZnFQYU&m=jSHL9oDZDh37nqFyak5E6UBF3ka2439pQmuh1_jwC8Q&s=3NjanlPt0pnnqMbE_6Tms5Wt1-jeeWCz1auOWNEgK_k&e=">https://bugs.llvm.org/show_bug.cgi?id=37240</a>).
I suspect this problem affects all targets; your patch D68076 would address it only for AArch64. Although I would suggest you do some careful measurements to determine the runtime performance effect, to decide whether this is acceptable.</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">The more complete approach in your steps 2 + 3 would solve this for all targets, assuming the solution did not have to be very target-specific. This would benefit
the entire community.</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">--paulr</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
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<p class="xmsonormal"><b><span style="font-size:10.0pt;font-family:"Tahoma",sans-serif">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma",sans-serif"> llvm-dev [<a href="mailto:llvm-dev-bounces@lists.llvm.org">mailto:llvm-dev-bounces@lists.llvm.org</a>]
<b>On Behalf Of </b>David Tellenbach via llvm-dev<br>
<b>Sent:</b> Thursday, September 26, 2019 5:57 AM<br>
<b>To:</b> llvm-dev<br>
<b>Cc:</b> nd<br>
<b>Subject:</b> [llvm-dev] [AArch64] Generated assembly differs depending on whether debug information is generated or not</span><o:p></o:p></p>
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<p class="xmsonormal"> <o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">Hi,</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Calibri",sans-serif;color:black"> </span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">we at Arm have noticed that assembly can differ when compiling for AArch64</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">depending on whether debug information is generated or not.
</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Calibri",sans-serif;color:black"> </span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">The issue is reproducible for the following small example compiled with `-O1`</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">for `aarch64-arm-linux-gnu`:</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Calibri",sans-serif;color:black"> </span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> a() {</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> b(a);</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> for (;;)</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> c("", b);</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> }</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Calibri",sans-serif;color:black"> </span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">The reason for the difference is that AArch64 frame lowering emits CFI</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">instructions if debug information is enabled but not if not. CFI instructions</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">act as scheduling boundaries during instruction scheduling and therefore lead to</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">differing scheduling regions and an overall different instruction scheduling.</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Calibri",sans-serif;color:black"> </span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">We see several ways to fix the issue and would welcome comments on this:</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Calibri",sans-serif;color:black"> </span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> 1. Enabling unwind tables by default for AArch64: By enabling unwind tables</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> by default CFI instructions will be inserted in both, debug and non-debug</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> mode. This should lead to smaller scheduling regions and probably to less</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> scheduling potential.</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Calibri",sans-serif;color:black"> </span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> However, I've measured the average size of scheduling regions for randomly</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> generated programs with and without default unwind tables and found an</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> average difference of 0.5 to 1 instruction. Other architectures such as x86</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> do exactly this and therefore don't face the issue.</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Calibri",sans-serif;color:black"> </span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> The following patch on Phabricator introduces the said change:</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">
<a href="https://urldefense.proofpoint.com/v2/url?u=https-3A__reviews.llvm.org_D68076&d=DwMFAg&c=DPL6_X_6JkXFx7AXWqB0tg&r=VEV8gWVf26SDOqiMtTxnBloZmItAauQlSqznsCc0KxY&m=alP6KoFztCbhtXL-SYaJVPAdcvyFLHC3ov_-8tMHupo&s=OYz6x7uqIq1oT9YjdwP9RHcyvZJHOw_EF7acFMnur6E&e=">
https://reviews.llvm.org/D68076</a></span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Calibri",sans-serif;color:black"> </span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> 2. Postpone insertion of CFI instructions until after instruction scheduling.</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> This would require a new pass running after instruction scheduling that
</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> inserts CFI instructions if needed. The downside I see is increased</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> compile-time and probably some code duplication with frame lowering.
</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Calibri",sans-serif;color:black"> </span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> 3. Change instruction scheduling such that CFI instructions get tied together</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> with relevant instructions in such a way that they get scheduled together.</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> If this could work it would probably the cleanest solution.</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Calibri",sans-serif;color:black"> </span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">To summarize:</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">1. would make scheduling in the non-debug case behave like in the</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">debug case and therefore probably cost some scheduling potential. However, it</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">would be by far the most easy to implement. 2. + 3. would probably lead to</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">better scheduling but seem to be more complex to implement.</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Calibri",sans-serif;color:black"> </span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black">Comments and additional ideas are welcome.</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Calibri",sans-serif;color:black"> </span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Courier New";color:black"> David</span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-family:"Calibri",sans-serif;color:black"> </span><o:p></o:p></p>
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