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<p class="MsoNormal"><span style="color:windowtext">I’ve noticed that there was an attempt to mitigate ExitValues problem in
<a href="https://reviews.llvm.org/D12494">https://reviews.llvm.org/D12494</a> that went nowhere. Were there particular issues with that approach?<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:windowtext"><o:p> </o:p></span></p>
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<p class="MsoNormal"><span style="color:windowtext">--<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:windowtext">Danila<o:p></o:p></span></p>
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<p class="MsoNormal"><b><span style="color:windowtext">From:</span></b><span style="color:windowtext"> Philip Reames [mailto:listmail@philipreames.com]
<br>
<b>Sent:</b> Saturday, August 10, 2019 02:05<br>
<b>To:</b> Danila Malyutin <Danila.Malyutin@synopsys.com>; Finkel, Hal J. <hfinkel@anl.gov><br>
<b>Cc:</b> llvm-dev@lists.llvm.org<br>
<b>Subject:</b> Re: [llvm-dev] How to best deal with undesirable Induction Variable Simplification?<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">On 8/9/19 8:27 AM, Danila Malyutin via llvm-dev wrote:<o:p></o:p></p>
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<p class="MsoNormal">Hi Hal,<o:p></o:p></p>
<p class="MsoNormal"> <o:p></o:p></p>
<p class="MsoNormal">I see. So LSR could theoretically counteract undesirable Ind Var transformations but it’s not implemented at the moment?<br>
<br>
I think I’ve managed to come up with a small reproducer that can also exhibit similar problem on x86, here it is:
<a href="https://urldefense.proofpoint.com/v2/url?u=https-3A__godbolt.org_z_-5Fwxzut&d=DwMD-g&c=DPL6_X_6JkXFx7AXWqB0tg&r=VEV8gWVf26SDOqiMtTxnBloZmItAauQlSqznsCc0KxY&m=xzJTtah1fNUz56fRe1yh10OCSBFg7IbzUhFcn8BPyJk&s=-qhi7IRwOrqjcv_cxlhP6lbVWspNKWeDT4amCIHR1sU&e=">
https://godbolt.org/z/_wxzut</a><o:p></o:p></p>
<p class="MsoNormal"> <o:p></o:p></p>
<p class="MsoNormal">As you can see, when rewriteLoopExitValues is not disabled Clang generates worse code due to additional spills, because Ind Vars rewrites all exit values of ‘a’ to recompute it’s value instead of reusing the value from the loop body. This
requires extra registers for the new “a after the loop” value (since it’s not simply reused) and also to store the new “offset”, which leads to the extra spills since they all live across big loop body. When exit values are not rewritten ‘a’ stays in it’s
`r15d` register with no extra costs.<o:p></o:p></p>
</blockquote>
<p>This hits on a point I've thought some about, but haven't tried to implement.<o:p></o:p></p>
<p>I think there might be room for a late pass which undoes the exit value rewriting. As an analogy, we have MachineLICM which sometimes undoes the transforms performed by LICM, but we still want the IR form to hoist aggressively for ease of optimization and
analysis. <o:p></o:p></p>
<p>Maybe this should be part of LSR, or maybe separate. Haven't thought about that part extensively.<o:p></o:p></p>
<p>It's worth noting that the SCEVs for the exit value of the value inside the loop and the rewritten exit value should be identical. So recognizing the case for potential rewriting is quite straight-forward. The profitability reasoning might be more involved,
but the legality part should essentially be handled by SCEV, and should be able to reuse exactly the same code as RLEV.
<o:p></o:p></p>
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<p class="MsoNormal"> <o:p></o:p></p>
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<p class="MsoNormal">--<o:p></o:p></p>
<p class="MsoNormal">Danila<o:p></o:p></p>
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<p class="MsoNormal"> <o:p></o:p></p>
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<p class="MsoNormal"><b>From:</b> Finkel, Hal J. [<a href="mailto:hfinkel@anl.gov">mailto:hfinkel@anl.gov</a>]
<br>
<b>Sent:</b> Thursday, August 8, 2019 21:24<br>
<b>To:</b> Danila Malyutin <a href="mailto:Danila.Malyutin@synopsys.com"><Danila.Malyutin@synopsys.com></a><br>
<b>Subject:</b> Re: [llvm-dev] How to best deal with undesirable Induction Variable Simplification?<o:p></o:p></p>
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<p class="MsoNormal"> <o:p></o:p></p>
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<p><span style="font-size:12.0pt">Hi, Danila,</span><o:p></o:p></p>
<p><span style="font-size:12.0pt"> </span><o:p></o:p></p>
<p><span style="font-size:12.0pt">Regarding the first case, this is certainly a problem that has come up before. As I recall, and I believe this is still true, LoopStrengthReduce, where we reason about induction variables while accounting for register pressure,
won't currently add new PHIs. People have talked about extending LSR to consider adding new PHIs in the past.</span><o:p></o:p></p>
<p><span style="font-size:12.0pt"> </span><o:p></o:p></p>
<p><span style="font-size:12.0pt">Regarding the second case, could you post a more-detailed description? I don't quite understand the issue.</span><o:p></o:p></p>
<p><span style="font-size:12.0pt"> </span><o:p></o:p></p>
<p><span style="font-size:12.0pt"> -Hal</span><o:p></o:p></p>
<p><span style="font-size:12.0pt"> </span><o:p></o:p></p>
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<p class="MsoNormal"><span style="font-size:10.0pt">Hal Finkel<br>
Lead, Compiler Technology and Programming Languages<br>
Leadership Computing Facility<br>
Argonne National Laboratory</span><o:p></o:p></p>
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<p class="MsoNormal"><b>From:</b> llvm-dev <<a href="mailto:llvm-dev-bounces@lists.llvm.org">llvm-dev-bounces@lists.llvm.org</a>> on behalf of Danila Malyutin via llvm-dev <<a href="mailto:llvm-dev@lists.llvm.org">llvm-dev@lists.llvm.org</a>><br>
<b>Sent:</b> Thursday, August 8, 2019 12:36 PM<br>
<b>To:</b> <a href="mailto:llvm-dev@lists.llvm.org">llvm-dev@lists.llvm.org</a> <<a href="mailto:llvm-dev@lists.llvm.org">llvm-dev@lists.llvm.org</a>><br>
<b>Subject:</b> [llvm-dev] How to best deal with undesirable Induction Variable Simplification?<span style="font-size:12.0pt">
</span><o:p></o:p></p>
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<p class="MsoNormal"><span style="font-size:12.0pt"> </span><o:p></o:p></p>
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<p class="xmsonormal"><span style="font-size:12.0pt">Hello,<br>
Recently I’ve come across two instances where Induction Variable Simplification lead to noticable performance regressions.</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:12.0pt">In one case, the removal of extra IV lead to the inability to reschedule instructions in a tight loop to reduce stalls. In that case, there were enough registers to spare, so using extra register for extra
induction variable was preferable since it reduced dependencies in the loop.<br>
In the second case, there was a big nested loop made even bigger after unswitching. However, the inner loop body was rather simple, of the form:</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:12.0pt">loop {</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:12.0pt"> p+=n;</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:12.0pt">…</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:12.0pt"> p+=n;</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:12.0pt">…</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:12.0pt">}<br>
use p.</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:12.0pt"> </span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:12.0pt">Due to unswitching there were several such loops each with the different number of p+=n ops, so when the IndVars pass rewrote all exit values, it added a lot of slightly different offsets to the main loop
header that couldn’t fit in the available registers which lead to unnecessary spills/reloads.<br>
<br>
I am wondering what is the usual strategy for dealing with such “pessimizations”? Is it possible to somehow modify the IndVarSimplify pass to take those issues into account (for example, tell it that adding offset computation + gep is potentially more expensive
than simply reusing last var from the loop) or should it be recovered in some later pass? If so, is there an easy way to revert IV elimination? Have anyone dealt with similar issues before?</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:12.0pt"> </span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:12.0pt">--</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:12.0pt">Danila</span><o:p></o:p></p>
<p class="xmsonormal"><span style="font-size:12.0pt"> </span><o:p></o:p></p>
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<o:p></o:p></p>
<pre>_______________________________________________<o:p></o:p></pre>
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