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<font size="2"><span style="font-size:11pt">>> As I recall the big one is that LLVM isn't well adapted to instruction<br>
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<div class="PlainText">>> sets without fungible registers.<br>
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>What does this mean exactly? How does the WDC 65816 not have fungible registers, while other processors do?<br>
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>> One idea is to use some of bank 0 as<br>
>> a source of registers, maybe with a custom pass to promote things to<br>
>> real registers where possible after the fact.<br>
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>How would I end up doing this? Do you mean bank 0 of the actual SNES ROM?<br>
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<div class="PlainText">Probably meant page 0, from a 6502 nomenclature, or "direct page" in 65816.</div>
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<div class="PlainText"><span>Ah, so the 6502 and 65816.<br>
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<div>As I recall...</div>
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<div>These processors have one general purpose register "accumulator" and two limited-use index registers "x" and "y".</div>
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<div>So basically no registers. </div>
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<div>Therefore there is a reported style of programming the 6502 where the first 256</div>
<div>bytes of memory -- "page 0" -- are used as general purpose registers instead.</div>
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<div>The stack pointer "S" btw is an 8 bit register, implicitly referencing the second 256 bytes</div>
<div>of memory -- "page 1". And silently wrapping around.</div>
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<div>Instructions referencing page 0 are smaller and faster than instructions referencing the rest of the 16bit address space.</div>
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<div>The 65816 is slightly less bad. It has a 24 bit address space (24 MB).</div>
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<div>It's stack pointer is widened to 16 bits, referencing anywhere in the first 64K.</div>
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<div>It also renames "page 0" to be "direct page", based via a new 16 bit "direct page" "D" register.</div>
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<div>If you assume a pushy/poppy ABI (like NT/x86, unlike NT/amd64), then these two registers combine to give you a semblance of a modern call sequence.</div>
<div>D is like ebp.</div>
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<div>When it was said "bank 0" it was probably meant "page 0".</div>
<div>Though 64K in 65816 might be a "bank" and the first 64K "bank 0".</div>
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<div>There is also a bank "K" register that implies the high 8 bits of most 16bit addresses (unless S- or D-relative).</div>
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<div>I'm still not sure what you'd do with this.</div>
<div>I guess you can try picking a small number of general</div>
<div>purpose registers. No more than 8, since x86 does "ok" with that.</div>
<div>Model them as all volatile.</div>
<div>Store them all on the direct page.</div>
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<div>?</div>
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<div>Despite their historical high usefuless and that I programmed and used both of these, they are difficult for me to imagine using</div>
<div>today.</div>
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<div>For the morbidly curious: The compare instruction only yields status bits useful for a conditional compare if the inputs</div>
<div>are considered unsigned. To do a "compare" of signed integers, requires a destructive subtract. (but if accumulator does not count</div>
<div>as a register, maybe you have not destroyed anything..)</div>
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<div>The interrupt enable/disable flag has a reversed meaning but same instruction mnemonics compared to x86.</div>
<div>So people write the code backwards. sei/cli, but interrupt flag enabling vs. inhibiting interrupts. </div>
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<div>There is no add without carry instruction. You have to clear carry first, like always (unless doing multi-precision math).</div>
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<div>The subtract/borrow meaning I believe is also same mnemonic but reversed meaning from x86.</div>
<div>You set carry before sbc, or such.</div>
<div>It made sense to me at the time based on elementary school math at least.</div>
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<div class="PlainText"> - Jay<br>
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