<div dir="ltr">Is there any structure at the LLVM backend that holds this information? I mean, can I get one machine instruction load and find out which other instructions in this function or even in other functions may modify its accessed memory location?</div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Thu, Mar 28, 2019 at 6:18 PM Fami H <<a href="mailto:hoseini.f@gmail.com" target="_blank">hoseini.f@gmail.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div dir="ltr">Thank you all for your responses.</div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Thu, Mar 28, 2019 at 2:59 PM David Greene <<a href="mailto:dag@cray.com" target="_blank">dag@cray.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Ryan Taylor via llvm-dev <<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>> writes:<br>
<br>
> r0 gets overwritten inside the loop (assuming dst, src, src), is ldr<br>
> r0, [r5] needed to initialize r0 for the loop at each iteration?<br>
<br>
Register allocation should handle that if the load is hoisted.<br>
<br>
I'm with the others. The printf is the most likely culprit.<br>
<br>
-0David<br>
<br>
> On Thu, Mar 28, 2019 at 10:17 AM Fami H via llvm-dev <<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>> wrote:<br>
><br>
> Hello all,<br>
><br>
> I am looking at the assembly code of a loop body which is created by applying O3 optimization. Here it is: <br>
><br>
> .LBB4_19: @ %for.body.91 <br>
> @ =>This Inner Loop Header: Depth=1 <br>
> ldr r0, [r5] <br>
> mov r1, r8 <br>
> add r0, r0, r7 <br>
> vldr s0, [r0] <br>
> mov r0, r6 <br>
> vcvt.f64.f32 d0, s0 <br>
> vmov r2, r3, d0 <br>
> bl fprintf <br>
> cmp r0, #0 <br>
> blt .LBB4_25 <br>
> @ BB#20: @ %for.cond.89 <br>
> @ in Loop: Header=BB4_19 Depth=1 <br>
> ldr r0, .LCPI4_2 <br>
> add r4, r4, #1 <br>
> add r7, r7, #4 <br>
> ldr r0, [r0] <br>
> cmp r4, r0 <br>
> blt .LBB4_19 <br>
><br>
> There are no other basic blocks in the loop. I am wondering why the first load instruction (ldr r0, [r5]) is repeatedly executed in the loop while the load<br>
> address (r5) is never changed in the loop body. Shouldn't this instruction be moved out of the loop as a result of -licm flag? I mean this load could have been<br>
> executed only once outside of the loop and the result could have been saved in the register and used in the loop. I'd greatly appreciate if anyone can tell me<br>
> why this is not the case. <br>
><br>
> Thank you in advance, <br>
> Fami <br>
><br>
> <br>
><br>
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</blockquote></div>
</blockquote></div>