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<div class="moz-text-flowed" style="font-family: -moz-fixed;
font-size: 14px;" lang="x-unicode">Hello,
<br>
<br>
I'm from Espressif Systems company, software department. Our
company develops processors based on Xtensa architecture like
ESP32 and ESP8266. We propose the integration of a backend
targeting Xtensa architecture.
<br>
<br>
We started to develop LLVM Xtensa backend almost a year ago. The
reason was that we saw a demand from our large developers
community. Currently only GNU compiler supports Xtensa
architecture. The company has approved me to develop and maintain
Xtensa backend.
<br>
<br>
We already have the initial version of the Xtensa backend, based
on LLVM Compiler Infrastructure, release 6.0.0. It was
successfully tested using GCC torture testsuite and multiple
applications.
<br>
<br>
These are the links to LLVM and Clang repositories.
<br>
<br>
<a class="moz-txt-link-freetext"
href="https://github.com/espressif/llvm-xtensa">https://github.com/espressif/llvm-xtensa</a>
<br>
<a class="moz-txt-link-freetext"
href="https://github.com/espressif/clang-xtensa">https://github.com/espressif/clang-xtensa</a>
<br>
<br>
Current version can generate Xtensa assembly code as output, not
object files yet, and has to be used together with GNU Binutils
and GCC-built libraries to create object and binary files.
<br>
<br>
Xtensa backend features implemented:
<br>
<br>
- Xtensa target description(Xtnesa.td, XtensaTargetMachine.cpp,
XtensaSubTarget.cpp)
<br>
- ISA desciption (XtensaInstrInfo.td, XtensaInstrFormats.td,
XtensaREgisterInfo.td)
<br>
- Xtensa Call ABI (XtensaCallingConv.td, XtensaFrameLowering.cpp)
<br>
- ASM printer/parser(XtesaAsmPrinter.cpp, XtensaInstrPrinter.cpp,
XtensaAsmParser.cpp)
<br>
<br>
Xtensa architecture features implemented in compiler:
<br>
<br>
- Xtensa Core Architecture instructions
<br>
- Code Density option
<br>
- Windowed Register option
<br>
- Floating-Point Coprocessor option
<br>
- Boolean option (only a subset of instructions)
<br>
- Thread Pointer option
<br>
- atomic operations
<br>
<br>
Current Xtensa target list:
<br>
<br>
- support Xtensa LX6 target (ESP32) by default
<br>
<br>
Compiler optimization levels include O0/O1/O2/O3/Os options.
<br>
<br>
With LLVM community approval, my next plans will be
<br>
<br>
- rebasing on the upstream version of LLVM.
<br>
- object code generation (XtensaMC package)
<br>
- implement test cases
<br>
- support for LX106 target (ESP8266)
<br>
- improvements of generated code performance
<br>
- support for zero-overhead loop option
<br>
- MAC16 option
<br>
<br>
There were some discussions about implementation of the Xtensa
backend and attempt to implement it:
<br>
<a class="moz-txt-link-freetext"
href="http://lists.llvm.org/pipermail/llvm-dev/2018-July/124789.html">http://lists.llvm.org/pipermail/llvm-dev/2018-July/124789.html</a>
<br>
<a class="moz-txt-link-freetext"
href="http://lists.llvm.org/pipermail/llvm-dev/2018-April/122676.html">http://lists.llvm.org/pipermail/llvm-dev/2018-April/122676.html</a>
<br>
<br>
Also there were attempts to implement a LLVM Xtensa backend, but
recently I found only one actual link:
<br>
<a class="moz-txt-link-freetext"
href="https://github.com/jdiez17/llvm-xtensa">https://github.com/jdiez17/llvm-xtensa</a>
<br>
<br>
All comments and suggesions are welcome!
<br>
<br>
Andrei Safronov
<br>
<br>
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