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    <p>The fix you're describing is probably correct.  That said, as far
      as I can tell, basically nothing in the ARM backend actually cares
      about the OperandType of an instruction, so I don't think it has
      any practical impact.<br>
    </p>
    <p><br>
    </p>
    <p>-Eli</p>
    <p><br>
    </p>
    <div class="moz-cite-prefix">On 1/21/2019 7:03 AM, Boekle, Yannick
      via llvm-dev wrote:<br>
    </div>
    <blockquote type="cite"
      cite="mid:9d37969a87e346cf8d2594ad6bde1894@uni-tuebingen.de">
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        <p>Hi all,</p>
        <p><br>
        </p>
        <p>I noticed that for the ARM instruction "ADDri" (which I
          assume to be "add register immediate") the 3rd operand which
          should intuitively have operand type MCOI::OPERAND_IMMEDIATE
          actually has MCOI::OPERAND_UNKNOWN (you can see this in
          ARMGenInstrInfo.inc inside the build folder).</p>
        <p><br>
        </p>
        <p>I fixed this by adding the line "let OperandType =
          OPERAND_IMMEDIATE;" in lib/Target/ARM/ARMInstrInfo.td in the
          definition of mod_imm (line 692).</p>
        <p><br>
        </p>
        <p>Is this an actual bug? And if so, what could be a proper fix?
          I'm not familiar with the intricacies of the ARM tablegen
          structure.</p>
        <p><br>
        </p>
        <p>I'm working on<br>
        </p>
        <p><a href="https://github.com/llvm-mirror/llvm"
            class="OWAAutoLink" id="LPlnk669561" previewremoved="true"
            moz-do-not-send="true">https://github.com/llvm-mirror/llvm</a></p>
        <p>branch: release_80</p>
        <p>commit: <span>8779077dde876ddfb6dfbe7f1da338f820a8fa13</span><br>
        </p>
        <p><br>
        </p>
        <p>Regards,</p>
        <p>Yannick<br>
        </p>
      </div>
      <br>
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</pre>
    </blockquote>
    <pre class="moz-signature" cols="72">-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project</pre>
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