<div dir="auto"><div class="gmail_quote" dir="auto"><div dir="ltr">For our out-of-tree backend, Machine LICM hoists the division instruction out of the following loop:</div><div lang="EN-US" link="#0563C1" vlink="#954F72"><div class="m_-3624494814741687775WordSection1"><p class="MsoNormal"><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">int foo(int n, int dividend, int divisor) {<u></u><u></u></p>
<p class="MsoNormal"> int a = 0;<u></u><u></u></p>
<p class="MsoNormal"> while (n--) {<u></u><u></u></p>
<p class="MsoNormal"> if (divisor != 0) {<u></u><u></u></p>
<p class="MsoNormal"> a += dividend / divisor;<u></u><u></u></p>
<p class="MsoNormal"> }<u></u><u></u></p>
<p class="MsoNormal"> }<u></u><u></u></p>
<p class="MsoNormal"> return a;<u></u><u></u></p>
<p class="MsoNormal">}<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">However, the division instruction causes a hardware exception when the divisor is zero, so there's a discrepancy between the actual and expected behaviours.<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">The most straightforward solution that declares the division instruction with hasSideEffects=1 has a significant downside:<u> </u>unnecessary order edges between division instructions and any other instructions that have unmodelled side effects; these edges hinder instruction scheduling. Although, I see that the X86 division instruction has unmodelled side-effects, it is not surprising, since instruction scheduling is not that important for out-of-order processors.</p><p class="MsoNormal"><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">Another solution is to introduce a new flag to MachineInstr, e.g., isDiv (similar to isAdd or mayLoad).<u> </u>Then, the MachineLICM pass will have to check for this flag when it looks for loop invariants. Are there significant downsides to this, or is there a better solution? I would appreciate your thoughts.</p><p class="MsoNormal"><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">Unfortunately, I cannot provide assembly code for our out-of-tree target, for which I apologize.<u> </u>I tried to reproduce the problem for the PowerPC backend: the division is hoisted but it seems that Power division instruction (divw) does not trap, so there is no problem there (but my knowledge of PPC is very limited).</p><p class="MsoNormal"><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">Best,</p><p class="MsoNormal">Alex</p><p class="MsoNormal"><u></u><u></u></p>
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