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<div><span>Thank you for answering my confusion.
</span></div><div><span>I have another questions.</span></div><div><span>If I add really instructions </span>instead <span style="line-height: 22.4px;">intrinsics</span><span style="line-height: 22.4px;"> ,can I r</span>each my purpose? </div><div>I guess ,the answer is "can't". <span style="line-height: 1.6;">I don't find the anything about how machine to do about instructions,especially "ALU" </span><span style="line-height: 22.4px;">instructions.</span></div><div><span style="line-height: 22.4px;">Thank you again,</span></div><div><span style="line-height: 22.4px;">Tianhao Shen</span></div><div><br></div>
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<div style="font-size:12px;line-height:1.5;word-break:break-all;margin-left:10px;margin-right:10px">On <span class="mail-date">11/14/2018 13:42</span>，<a class="mail-to" style="text-decoration:none;color:#2a83f2;" href="mailto:craig.topper@gmail.com">Craig Topper<craig.topper@gmail.com></a> wrote： </div>
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<div dir="ltr">For the most part target specific intrinsics are black boxes to llvm. They're just a little bit better than using inline assembly. They're pretty much just a way to say from C code that you want to use a specific fancy hardware instruction that does some operation that's not easy to express concisely in C. So they get passed through llvm and just tell the backend to emit a specific opcode into the final binary.<div><br></div><div>lli by default on x86 is a JIT compiler, it compiles llvm IR into native hardware instructions and makes the processor execute them. I believe you can force it to use an IR interpreter and not compile to native code, but I don't think it would support a target specific intrinsic in that mode.<br clear="all"><div><div dir="ltr" class="gmail_signature" data-smartmail="gmail_signature"><br></div><div dir="ltr" class="gmail_signature" data-smartmail="gmail_signature">~Craig</div></div><br></div></div><br><div class="gmail_quote"><div dir="ltr">On Tue, Nov 13, 2018 at 7:27 PM Tianhao Shen <<a href="mailto:17862703959@163.com">17862703959@163.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
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<span style="color:#8b8d94">From： </span>
<span><a class="m_-480637423254916727mail-from" style="text-decoration:none;color:#2a83f2" href="mailto:17862703959@163.com" target="_blank">
Tianhao Shen
<17862703959@163.com>
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<span style="color:#8b8d94">Date： </span>
<span class="m_-480637423254916727mail-date" style="color:black">11/14/2018 09:31</span>
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<span style="color:#8b8d94">To： </span>
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<a class="m_-480637423254916727mail-to" style="text-decoration:none;color:#2a83f2" href="mailto:craig.topper@gmail.com" target="_blank">
craig.topper@gmail.com
<craig.topper@gmail.com>
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<span style="color:#8b8d94">Subject： </span>
<span class="m_-480637423254916727mail-subject" style="color:black;word-break:break-word">Re: [llvm-dev] How to define an instruction</span>
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<span>Hi, </span><span style="line-height:22.4px">Craig</span></div><div><span style="line-height:22.4px">Thank you for r</span><span style="line-height:1.6">eplying to me.</span></div><div><span style="line-height:1.6">I guess that you misunderstand my meaning about "can'r run". I just want to run my </span><span style="line-height:22.4px">instruction</span><span style="line-height:22.4px"> by LLVM using the commands "clang -O0 -emit-llvm test.c -S -o test.ll" and "lli test.ll".But now ,when I use "</span><span style="line-height:22.4px">lli test.bc</span><span style="line-height:22.4px">" , the result shows as following:</span></div><div><div>Stack dump:</div><div>0.<span class="m_-480637423254916727Apple-tab-span" style="white-space:pre-wrap"> </span>Program arguments: lli test.ll </div><div>LLVMSymbolizer: error reading file: No such file or directory</div><div>#0 0x000000000211b709 (lli+0x211b709)</div><div>#1 0x000000000211b79c (lli+0x211b79c)</div><div>#2 0x0000000002119496 (lli+0x2119496)</div><div>#3 0x000000000211b104 (lli+0x211b104)</div><div>#4 0x00007fe3d188a390 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x11390)</div><div>#5 0x00007fe3d1cba035</div><div>#6 0x0000000001b7ff7f (lli+0x1b7ff7f)</div><div>#7 0x0000000001a83d44 (lli+0x1a83d44)</div><div>#8 0x000000000126ee7b (lli+0x126ee7b)</div><div>#9 0x00007fe3d05e7830 __libc_start_main /build/glibc-Cl5G7W/glibc-2.23/csu/../csu/libc-start.c:325:0</div><div>#10 0x000000000126b799 (lli+0x126b799)</div><div style="line-height:22.4px">illegal instruction(core dump)</div></div><div style="line-height:22.4px"><br></div><div>Can I do what I write above ?</div><div><span style="line-height:1.6">You wrote "</span><span style="line-height:22.4px">The compiler can't just make up a new instruction.</span><span style="line-height:1.6"> ".What do you</span><span style="line-height:22.4px"> mean? LLVM doesn't describe the </span><span style="line-height:1.6">calculation </span><span id="m_-480637423254916727result_box" class="m_-480637423254916727short_text" lang="en">process</span><span style="line-height:1.6">, or </span><span style="line-height:22.4px">scheduler model</span><span style="line-height:22.4px"> doesn't but other model does ? </span></div>
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<div style="font-family:微软雅黑,Verdana,'Microsoft Yahei',SimSun,sans-serif;line-height:1.6"><span style="line-height:1.6">Thanks </span><span style="line-height:1.6">sincerely</span><span style="line-height:1.6">,</span></div><div style="font-family:微软雅黑,Verdana,'Microsoft Yahei',SimSun,sans-serif;line-height:1.6"><span style="line-height:1.6">Tianhao Shen.</span></div><span>
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<div style="font-size:12px;line-height:1.5;word-break:break-all;margin-left:10px;margin-right:10px">On <span class="m_-480637423254916727mail-date">11/14/2018 01:55</span>，<a class="m_-480637423254916727mail-to" style="text-decoration:none;color:#2a83f2" href="mailto:craig.topper@gmail.com" target="_blank">Craig Topper<craig.topper@gmail.com></a> wrote： </div>
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<div dir="ltr"><div>What do you mean by can't be run? You can't just define your own instruction and execute it on real hardware. The behavior of an instruction is defined by the hardware manufacturer like Intel or AMD. The compiler can't just make up a new instruction. The scheduler model in LLVM is just a description of how many of the instruction can be done in parallel and how long it takes. It helps the compiler order instructions, but it doesn't provide any description of how the resulting bits are calculated.</div><div><br></div><div><div><div dir="ltr" class="m_-480637423254916727gmail_signature" data-smartmail="gmail_signature">~Craig</div></div><br></div></div><br><div class="gmail_quote"><div dir="ltr">On Tue, Nov 13, 2018 at 4:50 AM Tianhao Shen via llvm-dev <<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
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<div>Hi,</div><div><span style="line-height:1.6">I have some questions about instructions again.</span></div><div><span style="line-height:1.6">I have add a DAG successfully,I think.Because what I do can be c</span><span style="line-height:1.6">ompiled to LLVM IR and binary file.</span></div><div><span style="line-height:1.6">I guess,</span><span style="line-height:22.4px"> </span><span style="line-height:22.4px">the schedule</span><span style="line-height:1.6"> of an instruction tells the machine how to do . I don't konw if it's right.</span></div><div><span style="line-height:1.6">For example,there is the </span>definition <span style="line-height:1.6">of </span><span style="line-height:22.4px">IMUL32rr in X86InstrArithmetic.td</span><span style="line-height:22.4px">. "</span><span style="line-height:22.4px">WriteIMul32Reg</span><span style="line-height:22.4px">" is the most important and the defines the </span><span style="line-height:22.4px">multiplication</span><span style="line-height:22.4px">.</span></div><div><div style="line-height:1.6">def IMUL32rr : I<0xAF, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1,GR32:$src2),<span style="line-height:1.6">"imul{l}\t{$src2, $dst|$dst, $src2}",</span><span style="line-height:1.6"> [(set GR32:$dst, EFLAGS,</span><span style="line-height:1.6"> (X86smul_flag GR32:$src1, GR32:$src2))]>,</span><span style="line-height:1.6">Sched<[WriteIMul32Reg]>, TB, OpSize32;</span></div><div style="line-height:1.6"><span style="line-height:1.6">And in X86ScheduleXXX.td ,there is </span><span style="line-height:22.4px">definition of Ports and so on.</span></div><div style="line-height:1.6"><br></div><div style="line-height:1.6">My questions are here,as following:</div><div style="line-height:1.6">1.whether <span style="line-height:22.4px">the schedule</span><span style="line-height:1.6"> of an instruction defines the machine how to do.</span></div><div style="line-height:1.6">2.Why is there no "add" or "sub" instructions(<span style="line-height:22.4px">"</span><span style="line-height:22.4px">ALU insturctions</span><span style="line-height:22.4px">"</span><span style="line-height:1.6">) in </span><span style="line-height:22.4px">X86InstrArithmetic.td? How "</span><span style="line-height:22.4px">ALU insturctions</span><span style="line-height:22.4px">" define?</span></div><div style="line-height:1.6">3. I use the <span style="line-height:22.4px">WriteIMul32Reg in my insturction.</span><span style="line-height:1.6">In my imagination, my instruction should also be multiplication.But it doesn't work.(my </span><span style="line-height:22.4px">instruction can be </span><span style="line-height:1.6">c</span><span style="line-height:1.6">ompiled but can't run</span><span style="line-height:1.6">) .why can't </span><span style="line-height:22.4px">it</span><span style="line-height:1.6"> run? I think, it's no different with "</span><span style="line-height:22.4px">IMUL32rr</span><span style="line-height:22.4px"> </span><span style="line-height:1.6">"</span><span style="line-height:22.4px">.</span></div><div style="line-height:1.6">Here is the result :</div><div style="line-height:1.6"><span style="line-height:22.4px">test.c shows as </span><span style="line-height:22.4px">following:(the main content )</span></div><div style="line-height:1.6"><span style="line-height:22.4px">int a,b;</span></div><div style="line-height:1.6"><span style="line-height:22.4px">a=1;b=1;</span></div><div><span style="line-height:22.4px">a=</span>a=__builtin_x86_max_qb (a,b); <span style="line-height:22.4px">(the main </span><span style="line-height:22.4px">content</span><span style="line-height:22.4px"> </span><span style="line-height:22.4px"> )</span></div><div style="line-height:1.6"><span style="line-height:22.4px">test.ll shows as following:</span></div><div style="line-height:1.6"><span style="line-height:22.4px"><div style="line-height:1.6"> %0 = load i32, i32* %a, align 4</div><div style="line-height:1.6"> %1 = load i32, i32* %b, align 4</div><div style="line-height:1.6"> %2 = call i32 @llvm.x86.max.qb(i32 %1, i32 %2)</div><div style="line-height:1.6"> store i32 %2, i32* %a, align 4 </div><div style="line-height:1.6">when lli test.ll ,it goes wrong.</div></span></div><div style="line-height:1.6"><br></div><div style="line-height:1.6">Here is my all code:</div><div style="line-height:1.6">1. In llvm/include/llvm/IR/IntrinsicsX86.td : </div><div style="line-height:1.6"><span style="line-height:1.6">let TargetPrefix = </span><span class="m_-480637423254916727m_-8309579226568559962hljs-string" style="line-height:1.6">"x86"</span><span style="line-height:1.6"> in { </span></div><div><div style="line-height:1.6"><span style="line-height:1.6">def int_x86_max_qb: GCCBuiltin<"__builtin_x86_max_qb">,</span></div><div style="line-height:1.6"> Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [Commutative]>;</div><div style="line-height:1.6">}</div><div style="line-height:1.6">2. In llvm//tools/clang/include/clang/Basic/BuiltinsX86.def: </div><div style="line-height:1.6">BUILTIN(__builtin_x86_max_qb, "iii", "") </div><div style="line-height:1.6">3.In llvm/lib/Target/X86/X86ISelLowering.h:</div><div style="line-height:1.6">max_qb,</div><div><span style="line-height:1.6">4.In </span><span style="line-height:22.4px">llvm/lib/Target/X86/</span>X86IntrinsicsInfo.h:(IntrinsicsWithoutChain)</div><div style="line-height:1.6">X86_INTRINSIC_DATA(max_qb, INTR_TYPE_2OP, X86ISD::max_qb, 0),</div><div style="line-height:1.6">5.In<span style="line-height:1.6"> </span><span style="line-height:22.4px">llvm/lib/Target/X86/</span><span style="line-height:1.6">X86InstrInfo.td:</span></div><div><div style="line-height:1.6">def X86max_qb : SDNode<"X86ISD::max_qb", SDTBinaryArithWithFlags,</div><div style="line-height:1.6"> [SDNPCommutative]>;</div><div style="line-height:1.6">6.In X86InstrArithmetic.td: </div><div><div>let Defs = [EFLAGS] in {</div><div> let Constraints = "$src1 = $dst" in {</div><div> let isCommutable = 1 in {</div><div> def max_qb : I<0xF0,MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1,GR32:$src2),<span style="line-height:1.6"> "max_qb{w}\t {$dst, $src1,$src2|$dst, $src2,$src1}", [(set GR32:$dst,EFLAGS,(X86max_qb GR32:$src1, GR32:$src2))]>, Sched<[WriteIMul32Reg]>,</span><span style="line-height:1.6">OpSize32 ;</span></div><div><span style="line-height:1.6"> </span><span style="line-height:1.6"> </span><span style="line-height:1.6">}</span></div><div><span style="line-height:1.6"> </span><span style="line-height:1.6">}</span></div><div><span style="line-height:1.6">}</span></div><div><span style="line-height:1.6"><br></span></div><div><span style="line-height:1.6">I know,</span>this email is too long to read easily. But I hope you can read over and help me. </div></div></div><div style="line-height:1.6"><span style="line-height:1.6">Thanks </span><span style="line-height:1.6">sincerely</span><span style="line-height:1.6">,</span></div><div style="line-height:1.6"><span style="line-height:1.6">Tianhao Shen</span></div><span style="line-height:1.6"><div style="line-height:1.6"><br></div></span></div></div><div><span style="line-height:1.6"><br></span></div><div><span style="line-height:1.6"><br></span></div>
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