<div dir="ltr">The main x86 encoding scheme doesn't allow 3 independent registers. You'll have to switch to the VEX encoding scheme used by some of the newer instuctions like ANDN, SHRX, SHLX, SARX. This allows 3 registers to be encoded.<div><br></div><div>Add ", VEX_4V" to the end of your instruction definition.<br><div><br clear="all"><div><div dir="ltr" class="gmail_signature" data-smartmail="gmail_signature">~Craig</div></div><br></div></div></div><br><div class="gmail_quote"><div dir="ltr">On Thu, Nov 8, 2018 at 2:43 AM Tianhao Shen <<a href="mailto:17862703959@163.com">17862703959@163.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
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<div><span id="m_4871330369691334915result_box" class="m_4871330369691334915short_text" lang="en">Thank you for answering my questions.</span></div><div><span class="m_4871330369691334915short_text" lang="en">I don't understand how to disarm the constraints, because I want to my instruction like "c=max_qb(a,b)".</span></div><div>Thank you again.</div><div>Tianhao Shen.</div>
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<div style="font-size:12px;line-height:1.5;word-break:break-all;margin-left:10px;margin-right:10px">On <span class="m_4871330369691334915mail-date">11/8/2018 01:33</span>，<a class="m_4871330369691334915mail-to" style="text-decoration:none;color:#2a83f2" href="mailto:craig.topper@gmail.com" target="_blank">Craig Topper<craig.topper@gmail.com></a> wrote： </div>
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<div dir="ltr">The "Unhandled immediate encoding GR32" is fixed by the "let Constraints = "$src1 = $dst". That tells the disassembler, encoder, and register allocator that $src1 and $dst must always be the same physical register. This is true of all the basic X86 arithmetic instructions where one of the inputs is always overwritten by the output.<div><br clear="all"><div><div dir="ltr" class="m_4871330369691334915gmail_signature" data-smartmail="gmail_signature">~Craig</div></div><br></div></div><br><div class="gmail_quote"><div dir="ltr">On Tue, Nov 6, 2018 at 11:26 PM Tianhao Shen via llvm-dev <<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
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<div>Hi,every one.</div><div>I' in trouble again.</div><div>I want add a new intrinsic mapping a new instruction.</div><div><br></div><div><span style="line-height:1.6">I add the int_x86_max_qb as fllowing:</span></div><div><span style="line-height:1.6">def int_x86_max_qb: GCCBuiltin<</span><span class="m_4871330369691334915m_8470693100474516751hljs-string" style="line-height:1.6">"__builtin_x86_max_qb"</span><span style="line-height:1.6">>, </span><span style="line-height:1.6">Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [Commutative]>;</span></div><div><span style="line-height:1.6"><br></span></div><div><span style="line-height:1.6"><div>BUILTIN(__builtin_x86_max_qb, "iii", "") </div><div><br></div><div><span style="line-height:22.4px">I define the </span><span style="line-height:22.4px">intrinsic as </span><span style="line-height:1.6">Pseudo instruction,it succeed.</span></div><div><span style="line-height:1.6"><br></span></div><div><span style="line-height:1.6">But when mapping a new </span><span style="line-height:22.4px">instruction.I don't know how to do.</span></div><div><span style="line-height:22.4px">In x86InstrArithmetic.td. I add ,(To </span><span style="line-height:1.6">make sure the </span><span style="line-height:22.4px">Sched </span><span style="line-height:1.6">is right, I use the </span><span style="line-height:22.4px">WriteIMul16Reg</span><span style="line-height:1.6"> </span><span style="line-height:22.4px">)</span></div></span><div><div style="line-height:1.6">def max_qb : I<0xF0,MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1,GR32:$src2),<span style="line-height:1.6"> "max_qb\t {$dst, $src1,$src2}", [(set GR32:$dst,(X86max_qb GR32:$src1, GR32:$src2))]>,Sched<[WriteIMul16Reg]>,</span><span style="line-height:1.6">OpSize32 ;</span></div><div style="line-height:1.6"><span style="line-height:1.6">when </span><span id="m_4871330369691334915m_8470693100474516751result_box" class="m_4871330369691334915m_8470693100474516751short_text" lang="en">compile </span><span style="line-height:1.6">LLVM , the error appears.</span></div><div style="line-height:1.6"><span style="line-height:1.6">"</span><span style="line-height:1.6">[ 97%] Updating X86GenAsmWriter1.inc... </span></div><div style="line-height:1.6"><span style="line-height:1.6">Unhandled immediate encoding GR32</span></div><div style="line-height:1.6">Unhandled immediate encoding</div><div style="line-height:1.6"><span style="line-height:1.6">"</span></div><div style="line-height:1.6"><span style="line-height:1.6"><br></span></div><div><span style="line-height:1.6">But when I write the same as the </span><span style="line-height:22.4px">instruction</span><span style="line-height:1.6"> </span><span style="line-height:1.6">IMUL32rr, there is no error in </span><span style="line-height:22.4px">compiling.(I don't use the </span><span style="line-height:22.4px">EFLAGS at all, so I think it's wrong. I</span><span style="line-height:1.6">ndeed, it made a error when using it.</span><span style="line-height:22.4px">)</span></div><div>let Defs = [EFLAGS] in {</div><div><div>let Constraints = "$src1 = $dst" in {</div><div>let isCommutable = 1 in {</div></div></div><span style="line-height:1.6"><div><span style="line-height:22.4px">def max_qb : I<0xF0,MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1,GR32:$src2),</span><span style="line-height:1.6"> "max_qb\t {$dst, $src1,$src2}", [(set GR32:$dst,(X86max_qb GR32:$src1, GR32:$src2))]>,Sched<[WriteIMul16Reg]>,</span><span style="line-height:1.6">OpSize32 ;</span></div><div><span style="line-height:1.6">}</span></div><div><span style="line-height:1.6">}</span></div><div><span style="line-height:1.6"><br></span></div><div><span style="line-height:1.6">What I don't understand is that how I define "let in ".</span></div><div><span style="line-height:1.6">Thanks,</span></div><div><span style="line-height:1.6">Tianhao Shen.</span></div><div><br></div><div><br></div></span></div>
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