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<p class="MsoNormal">Hi,<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">I’m implementing the built_vector as an IMPLICIT_DEF followed by INSERT_SUBREGs. This approach is the one of the SPARC architecture.
<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black">def : Pat<(build_vector (f32 fpimm:$a1), (f32 fpimm:$a2)),</span><span style="font-size:10.0pt;font-family:"Courier New","serif""><o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> (INSERT_SUBREG(INSERT_SUBREG (v2f32 (IMPLICIT_DEF)),</span><span style="font-size:10.0pt;font-family:"Courier New","serif""><o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> (i32 (COPY_TO_REGCLASS (MOVSUTO_A_iSLo (bitcast_fpimm_to_i32 f32:$a1)), FPUaOffsetClass)), A_UNIT_PART),</span><span style="font-size:10.0pt;font-family:"Courier New","serif""><o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> (i32 (COPY_TO_REGCLASS (MOVSUTO_A_iSLo (bitcast_fpimm_to_i32 f32:$a2)), FPUaOffsetClass)), B_UNIT_PART)>;</span><span style="font-size:10.0pt;font-family:"Courier New","serif""><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-family:"Courier New","serif""><o:p> </o:p></span></p>
<p class="MsoNormal">This work quite well: an <span style="font-size:10.0pt;font-family:"Courier New","serif";color:black">
IMPLICIT_DEF:v2f32 </span>is generated.<o:p></o:p></p>
<p class="MsoNormal"><span style="font-family:"Courier New","serif""><o:p> </o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black">Selected selection DAG: BB#0 'vector2floatMulSum:entry'<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black">SelectionDAG has 19 nodes:<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> t0: ch = EntryToken<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> t2: v2f32,ch = CopyFromReg t0, Register:v2f32 %vreg0<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> t4: v2f32,ch = CopyFromReg t2:1, Register:v2f32 %vreg1<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> t14: i16 = MOVSUTO_A_iSLo Constant:i32<1084227584><o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> t16: i32 = COPY_TO_REGCLASS t14, TargetConstant:i32<8><o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> t18: v2f32 = INSERT_SUBREG IMPLICIT_DEF:v2f32, t16, TargetConstant:i32<1><o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> t6: v2f32 = INSERT_SUBREG t18, t16, TargetConstant:i32<2><o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> t7: v2f32 = FMUL_AB_oo t2, t6<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="FR-BE"><o:p> </o:p></span></p>
<p class="MsoNormal">But there is one small issue in the inference of RegisterClass of the implicitly defined register.<o:p></o:p></p>
<p class="MsoNormal">As shown below, the <span style="font-size:10.0pt;font-family:"Courier New","serif";color:black">
%vreg6<def> </span>is implicitly defined as <span style="font-size:10.0pt;font-family:"Courier New","serif";color:black">
FPUabRegisterClass</span>.<o:p></o:p></p>
<p class="MsoNormal">This register class accepts the v2f32 type, but for others addressing mode context this register should be
<span style="font-size:10.0pt;font-family:"Courier New","serif";color:black">FPUabOffsetClass.<o:p></o:p></span></p>
<p class="MsoNormal">Is there a mechanism, an option to inforce/control the RegisterClass of registers defined by IMPLICIT_DEF ?<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"># Machine code for function vector2floatMulSum: SSA<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black">Function Live Ins: %FA_ROFF1 in %vreg0, %FA_ROFF2 in %vreg1<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"><o:p> </o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black">BB#0: derived from LLVM BB %entry<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> Live Ins: %FA_ROFF1 %FA_ROFF2<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> %vreg1<def> = COPY %FA_ROFF2; FPUabOffsetClass:%vreg1<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> %vreg0<def> = COPY %FA_ROFF1; FPUabOffsetClass:%vreg0<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> %vreg3<def> = MOVSUTO_A_iSLo 1084227584, %RSPA<imp-use>; FPUaOffsetClass:%vreg3<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> %vreg4<def> = COPY %vreg3; FPUaOffsetClass:%vreg4,%vreg3<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"><o:p> </o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black">-> %vreg6<def> = IMPLICIT_DEF; FPUabRegisterClass:%vreg6<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"><o:p> </o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> %vreg5<def,tied1> = INSERT_SUBREG %vreg6<tied0>, %vreg4, A_UNIT_PART; FPUabRegisterClass:%vreg5,%vreg6 FPUaOffsetClass:%vreg4<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> %vreg7<def,tied1> = INSERT_SUBREG %vreg5<tied0>, %vreg4, B_UNIT_PART; FPUabRegisterClass:%vreg7,%vreg5 FPUaOffsetClass:%vreg4<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> %vreg9<def> = COPY %vreg7; FPUabOffsetClass:%vreg9 FPUabRegisterClass:%vreg7<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"> %vreg8<def> = FMUL_AB_oo %vreg0, %vreg9<kill>, %RFLAGA<imp-def,dead>, %RFLAGB<imp-def,dead>, %RSPA<imp-use>, %RSPB<imp-use>;
FPUabROUTMULRegisterClass:%vreg8 FPUabOffsetClass:%vreg0,%vreg9<o:p></o:p></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New","serif";color:black"><o:p> </o:p></span></p>
<p class="MsoNormal" style="margin-bottom:12.0pt"><span lang="FR-BE" style="font-size:12.0pt;font-family:"Times New Roman","serif""><o:p> </o:p></span></p>
<p class="MsoNormal" style="margin-bottom:12.0pt"><span lang="FR-BE" style="font-size:12.0pt;font-family:"Times New Roman","serif""><br>
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<o:p></o:p></span></p>
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<p class="MsoNormal"><span style="font-size:12.0pt;font-family:"Times New Roman","serif""><img width="536" height="49" id="_x0000_i1025" src="http://www.spacebel.be/wp-content/uploads/2018/02/image-sign-sbp30y-1.jpg" alt="http://www.spacebel.be/wp-content/uploads/2018/02/image-sign-sbp30y-1.jpg"></span><span style="font-size:12.0pt;font-family:"Times New Roman","serif""><o:p></o:p></span></p>
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<p class="MsoNormal" align="center" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;text-align:center">
<b><span lang="FR-BE" style="font-size:10.0pt">Dominique Torette</span></b><span lang="FR-BE" style="font-size:10.0pt">
<br>
System Architect<br>
Rue des Chasseurs Ardennais - Liège Science Park - B-4031 Angleur <br>
Tel: +32 (0) 4 361 81 11 - Fax: +32 (0) 4 361 81 20 <br>
</span><span style="font-size:10.0pt"><a href="http://www.spacebel.be/"><span lang="FR-BE" style="color:blue">www.spacebel.be</span></a></span><span lang="FR-BE" style="font-size:12.0pt;font-family:"Times New Roman","serif""><o:p></o:p></span></p>
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<p class="MsoNormal"><span lang="FR-BE"><o:p> </o:p></span></p>
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