<div dir="ltr"><div class="gmail_default" style="font-family:arial,helvetica,sans-serif">For direct mapping, I guess you can `grep addReg` in `lib/Target` to see how things done.</div><div class="gmail_default" style="font-family:arial,helvetica,sans-serif"><br></div><div class="gmail_default" style="font-family:arial,helvetica,sans-serif">HTH,</div><div class="gmail_default" style="font-family:arial,helvetica,sans-serif">chenwj</div></div><div class="gmail_extra"><br><div class="gmail_quote">2018-03-30 20:27 GMT+08:00 Dominique Torette via llvm-dev <span dir="ltr"><<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>></span>:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
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<p class="MsoNormal"><span style="color:#1f497d">Hi again,<u></u><u></u></span></p>
<p class="MsoNormal"><span style="color:#1f497d"><u></u> <u></u></span></p>
<p class="MsoNormal"><span style="color:#1f497d">After further investigation, I’ve found that the private PhysRegUseDefLists array (“head of use/def list for physical register”) from MachineRegisterInfo class seems to be empty.<u></u><u></u></span></p>
<p class="MsoNormal"><span style="color:#1f497d">But I didn’t found any methods for updating such data structure. How/where this “use/def list” should be managed ?
<u></u><u></u></span></p>
<p class="MsoNormal"><span style="color:#1f497d"><u></u> <u></u></span></p>
<p class="MsoNormal"><span style="color:#1f497d">Is the documentation</span> <a href="https://clicktime.symantec.com/a/1/VD92eMlNQNYWvTHMFGJ6d9CoI8TWzptcPQ9N_WgcsEc=?d=BGAdaOmUwTeTJGDCY0PxccF0_w2aXYWPkZ7TqUaX5BfIwvuies1FpFGWK0a0V-ztU78uUhUTIHuntFNIacX_7R-N7h4qVswHza4R-xOhmPRaQu6xRDCjEZfI6H1_u4borbcUPyDQ6liK-yuculXq6ICDidJQPJtYEveno35W1lltgoNkAeIagO29GvgnsgoziKJ4U4zRUDXIZwQeuBXTC3NRd9iLtHz1IZhXsFCNmIC7QGkD278pz90U42sWT96yrGQLpPfsfpg05TFLkE_BGipWpMwKeLCYUqii7-0V9sOqCdVrNOfjC3Ruk9eeyMyFZS5pjXRNSNFElfHytB77QRZC87cWwM8aULV5KlIMMkmasWMWav7pb5xQc8VgqrXKzD2DtrP8F80Uyc48XqNNjuzvmT7TK7cDvvzhGtUvS4WXZfr-70e3-6fpQa4k&u=https%3A%2F%2Fllvm.org%2Fdocs%2FCodeGenerator.html%23mapping-virtual-registers-to-physical-registers" target="_blank">
https://llvm.org/docs/<wbr>CodeGenerator.html#mapping-<wbr>virtual-registers-to-physical-<wbr>registers</a>
<span style="color:#1f497d">still valid ?</span><u></u><u></u></p>
<p class="MsoNormal"><span style="color:#1f497d">Are there other options to enforce the mapping of virtual registers to physical ones ?<u></u><u></u></span></p>
<p class="MsoNormal"><span style="color:#1f497d"><u></u> <u></u></span></p>
<p class="MsoNormal"><span style="color:#1f497d">TIA, Dominique Torette.<u></u><u></u></span></p>
<p class="MsoNormal"><span style="color:#1f497d"><u></u> <u></u></span></p>
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<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> llvm-dev [mailto:<a href="mailto:llvm-dev-bounces@lists.llvm.org" target="_blank">llvm-dev-bounces@<wbr>lists.llvm.org</a>]
<b>On Behalf Of </b>Dominique Torette via llvm-dev<br>
<b>Sent:</b> jeudi 29 mars 2018 15:48<br>
<b>To:</b> <a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a><br>
<b>Subject:</b> [llvm-dev] Mapping virtual registers to physical registers<u></u><u></u></span></p>
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<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">Hi,<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">In the context of MachineCode custom inserter, I’m trying to enforce the mapping of virtual register to a physical one.<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">According to the documentation <a href="https://clicktime.symantec.com/a/1/VD92eMlNQNYWvTHMFGJ6d9CoI8TWzptcPQ9N_WgcsEc=?d=BGAdaOmUwTeTJGDCY0PxccF0_w2aXYWPkZ7TqUaX5BfIwvuies1FpFGWK0a0V-ztU78uUhUTIHuntFNIacX_7R-N7h4qVswHza4R-xOhmPRaQu6xRDCjEZfI6H1_u4borbcUPyDQ6liK-yuculXq6ICDidJQPJtYEveno35W1lltgoNkAeIagO29GvgnsgoziKJ4U4zRUDXIZwQeuBXTC3NRd9iLtHz1IZhXsFCNmIC7QGkD278pz90U42sWT96yrGQLpPfsfpg05TFLkE_BGipWpMwKeLCYUqii7-0V9sOqCdVrNOfjC3Ruk9eeyMyFZS5pjXRNSNFElfHytB77QRZC87cWwM8aULV5KlIMMkmasWMWav7pb5xQc8VgqrXKzD2DtrP8F80Uyc48XqNNjuzvmT7TK7cDvvzhGtUvS4WXZfr-70e3-6fpQa4k&u=https%3A%2F%2Fllvm.org%2Fdocs%2FCodeGenerator.html%23mapping-virtual-registers-to-physical-registers" target="_blank">
https://llvm.org/docs/<wbr>CodeGenerator.html#mapping-<wbr>virtual-registers-to-physical-<wbr>registers</a><u></u><u></u></p>
<p class="MsoNormal">There are two ways: the direct one and the indirect ones. The indirect ones refer
<span style="font-size:10.0pt;font-family:Consolas;color:black;background:white">
VirtRegMap class that I’ve never found. So I tried the direct one…<u></u><u></u></span></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">Mapping virtual registers to physical registers<u></u><u></u></p>
<p class="MsoNormal">^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^<wbr>^^^^<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">There are two ways to map virtual registers to physical registers (or to memory<u></u><u></u></p>
<p class="MsoNormal">slots). The first way, that we will call *direct mapping*, is based on the use<u></u><u></u></p>
<p class="MsoNormal">of methods of the classes ``TargetRegisterInfo``, and ``MachineOperand``. The<u></u><u></u></p>
<p class="MsoNormal">second way, that we will call *indirect mapping*, relies on the ``VirtRegMap``<u></u><u></u></p>
<p class="MsoNormal">class in order to insert loads and stores sending and getting values to and from<u></u><u></u></p>
<p class="MsoNormal">memory.<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">The direct mapping provides more flexibility to the developer of the register<u></u><u></u></p>
<p class="MsoNormal">allocator; however, it is more error prone, and demands more implementation<u></u><u></u></p>
<p class="MsoNormal">work. Basically, the programmer will have to specify where load and store<u></u><u></u></p>
<p class="MsoNormal">instructions should be inserted in the target function being compiled in order<u></u><u></u></p>
<p class="MsoNormal">to get and store values in memory. To assign a physical register to a virtual<u></u><u></u></p>
<p class="MsoNormal">register present in a given operand, use ``MachineOperand::setReg(p_<wbr>reg)``. To<u></u><u></u></p>
<p class="MsoNormal">insert a store instruction, use ``TargetInstrInfo::<wbr>storeRegToStackSlot(...)``,<u></u><u></u></p>
<p class="MsoNormal">and to insert a load instruction, use ``TargetInstrInfo::<wbr>loadRegFromStackSlot``.<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">…<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">I tried the direct mapping as following:<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New";color:black"> MachineOperand destination = MI->getOperand(0);</span><span style="font-size:10.0pt;font-family:"Courier New""><u></u><u></u></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New";color:black"> MachineOperand offset = MI->getOperand(1);</span><span style="font-size:10.0pt;font-family:"Courier New""><u></u><u></u></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New""> <wbr>
<u></u><u></u></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New";color:black">
</span><b><span style="font-size:10.0pt;font-family:"Courier New";color:#7f0055">unsigned</span></b><span style="font-size:10.0pt;font-family:"Courier New";color:black"> destinationReg = destination.getReg();</span><span style="font-size:10.0pt;font-family:"Courier New""><u></u><u></u></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New";color:black"> int64_t FrameIndex = offset.getIndex();</span><span style="font-size:10.0pt;font-family:"Courier New""><u></u><u></u></span></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal"> destination.setReg(CLP::FA_<wbr>ROFF0+FrameIndex);<u></u><u></u></p>
<p class="MsoNormal"> destination.setIsDef(true);<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal"> TII->loadRegFromStackSlot(*<wbr>MBB,<u></u><u></u></p>
<p class="MsoNormal"> <wbr> MI, destinationReg, FrameIndex,<u></u><u></u></p>
<p class="MsoNormal"> <wbr> &CLP::FPUaOffsetClassRegClass, TRI);<u></u><u></u></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:12.0pt;font-family:"Times New Roman","serif""><br>
</span><span style="font-size:10.0pt;font-family:"Courier New";color:black">The code after customInserter seems valid but the compilation later hang-up in an infinite loop in procedure computeVirtRegs(); of pass LiveIntervals::<wbr>runOnMachineFunction.<u></u><u></u></span></p>
<p class="MsoNormal" style="text-autospace:none"><span style="font-size:10.0pt;font-family:"Courier New";color:black">In other targets, I’ve seen an example with a setIsDef(true) for such physically mapped register. Is there something missing in my code (register
other setting,…) ? <u></u><u></u></span></p>
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<b><span style="font-size:10.0pt">Dominique Torette</span></b><span style="font-size:10.0pt">
<br>
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<br></blockquote></div><br><br clear="all"><div><br></div>-- <br><div class="gmail_signature" data-smartmail="gmail_signature"><div dir="ltr"><div>Wei-Ren Chen (陳韋任)<br>Homepage: <a href="https://people.cs.nctu.edu.tw/~chenwj" target="_blank">https://people.cs.nctu.edu.tw/~chenwj</a></div></div></div>
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