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<p>Hello everyone,</p>
I'm working on a MachineFunctionPass that inserts a list of
instructions into an Module so a later Pass can work on them.<br>
To do so I load a dummy .ll file created from a main stub, create
the needed function stubs (ModulePass), insert Blocks and create
instructions using BuildMI.<br>
I started with branch instructions:<br>
<blockquote> const TargetMachine &TM = MF.getTarget();<br>
const MCInstrInfo *TII = TM.getMCInstrInfo();<br>
DebugLoc DL;<br>
BuildMI(BB, BB.end(), DL,
TII->get(ARM::B)).addMBB(trgBlock);<br>
</blockquote>
these are working fine.<br>
When creating an compare instruction like cmp r0, 1 with:<br>
<blockquote> BuildMI(BB, BB.end(), DL,
TII->get(ARM::tCMPi8),0).addImm(1);<br>
</blockquote>
I get the following error: <br>
<blockquote> .../include/llvm/MC/MCInst.h:81: int64_t
llvm::MCOperand::getImm() const: Assertion `isImm() &&
"This is not an immediate"' failed.<br>
</blockquote>
Which even after hours I can't make sense why the operand kind is
wrong.<br>
<br>
Another thing I noticed is that using ARM::tB results in the
following error:<br>
<blockquote>.../include/llvm/ADT/SmallVector.h:154: const T&
llvm::SmallVectorTemplateCommon<T,
<template-parameter-1-2>
>::operator[](llvm::SmallVectorTemplateCommon<T,
<template-parameter-1-2> >::size_type) const [with T =
llvm::MCOperand; <template-parameter-1-2> = void;
llvm::SmallVectorTemplateCommon<T,
<template-parameter-1-2> >::const_reference = const
llvm::MCOperand&; llvm::SmallVectorTemplateCommon<T,
<template-parameter-1-2> >::size_type = long unsigned
int]: Assertion `idx < size()' failed.<br>
<br>
</blockquote>
The architecture is ARMv6-m, I am using llvm 7, the dummy.ll was
created with llvm 3.9<br>
Hope to find some help here, best regards<br>
<br>
Julius Hiller<br>
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