<div dir="ltr">Hi Leslie,<div><br></div><div>There is a disable unroll meta data (!llvm.loop !2) associated with unCatN loop basic block , probaly in the source pragma clang loop unroll (disable) was used before the loop.</div><div><br></div><div>I tried removing that and used -unroll-count=4 both the catN and uncatN were unrolled. </div><div><br></div><div>Options : -mem2reg -loops -loop-simplify -loop-rotate -lcssa -loop-unroll -unroll-count=4 -sccp -simplifycfg -o /tmp/1 -debug-only=loop-unroll.</div><div><br></div><div><div>Loop Unroll: F[catN] Loop %for.body</div><div> Loop Size = 17</div><div>UNROLLING loop %for.body by 4!</div><div>Loop Unroll: F[unCatN] Loop %for.body</div><div> Loop Size = 9</div><div>UNROLLING loop %for.body by 4 with run-time trip count!</div></div><div><br></div><div>Thanks,</div><div>Jatin</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Wed, Oct 25, 2017 at 10:17 AM, Leslie Zhai via llvm-dev <span dir="ltr"><<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Hi Michael,<br>
<br>
Dropped *optnone* still failed to unroll loops for this testcase:<br>
<br>
$ cat cat_state.n044.ll<br>
; ModuleID = 'cat_state.n045a.ll'<br>
source_filename = "cat_state.n04_merged.scaffold<wbr>"<br>
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32<wbr>:64-S128"<br>
target triple = "x86_64-unknown-linux-gnu"<br>
<br>
; Function Attrs: noinline nounwind uwtable<br>
define void @catN(i16* %bit, i32 %n) local_unnamed_addr #0 {<br>
entry:<br>
%0 = load i16, i16* %bit, align 2<br>
tail call void @llvm.H.i16(i16 %0)<br>
%cmp1 = icmp sgt i32 %n, 1<br>
br i1 %cmp1, label %<a href="http://for.body.lr.ph" rel="noreferrer" target="_blank">for.body.lr.ph</a>, label %for.end<br>
<br>
<a href="http://for.body.lr.ph" rel="noreferrer" target="_blank">for.body.lr.ph</a>: <wbr> ; preds = %entry<br>
%1 = add i32 %n, -1<br>
%2 = add i32 %n, -2<br>
%xtraiter = and i32 %1, 1<br>
%3 = icmp ult i32 %2, 1<br>
br i1 %3, label %for.cond.for.end_crit_edge.un<wbr>r-lcssa, label %for.body.lr.ph.new<br>
<br>
for.body.lr.ph.new: <wbr> ; preds = %<a href="http://for.body.lr.ph" rel="noreferrer" target="_blank">for.body.lr.ph</a><br>
%unroll_iter = sub i32 %1, %xtraiter<br>
br label %for.body<br>
<br>
for.body: <wbr> ; preds = %for.body, %for.body.lr.ph.new<br>
%inc3 = phi i32 [ 1, %for.body.lr.ph.new ], [ %inc.1, %for.body ]<br>
%niter = phi i32 [ %unroll_iter, %for.body.lr.ph.new ], [ %niter.nsub.1, %for.body ]<br>
%idxprom = sext i32 %inc3 to i64<br>
%arrayidx1 = getelementptr inbounds i16, i16* %bit, i64 %idxprom<br>
%4 = load i16, i16* %arrayidx1, align 2<br>
%sub = add nsw i32 %inc3, -1<br>
%idxprom2 = sext i32 %sub to i64<br>
%arrayidx3 = getelementptr inbounds i16, i16* %bit, i64 %idxprom2<br>
%5 = load i16, i16* %arrayidx3, align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %4, i16 %5)<br>
%inc = add nsw i32 %inc3, 1<br>
%niter.nsub = sub i32 %niter, 1<br>
%idxprom.1 = sext i32 %inc to i64<br>
%arrayidx1.1 = getelementptr inbounds i16, i16* %bit, i64 %idxprom.1<br>
%6 = load i16, i16* %arrayidx1.1, align 2<br>
%idxprom2.1 = sext i32 %inc3 to i64<br>
%arrayidx3.1 = getelementptr inbounds i16, i16* %bit, i64 %idxprom2.1<br>
%7 = load i16, i16* %arrayidx3.1, align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %6, i16 %7)<br>
%inc.1 = add nsw i32 %inc, 1<br>
%niter.nsub.1 = sub i32 %niter.nsub, 1<br>
%niter.ncmp.1 = icmp ne i32 %niter.nsub.1, 0<br>
br i1 %niter.ncmp.1, label %for.body, label %for.cond.for.end_crit_edge.un<wbr>r-lcssa<br>
<br>
for.cond.for.end_crit_edge.unr<wbr>-lcssa: ; preds = %for.body, %<a href="http://for.body.lr.ph" rel="noreferrer" target="_blank">for.body.lr.ph</a><br>
%inc3.unr = phi i32 [ 1, %<a href="http://for.body.lr.ph" rel="noreferrer" target="_blank">for.body.lr.ph</a> ], [ %inc.1, %for.body ]<br>
%lcmp.mod = icmp ne i32 %xtraiter, 0<br>
br i1 %lcmp.mod, label %for.body.epil, label %for.end<br>
<br>
for.body.epil: <wbr> ; preds = %for.cond.for.end_crit_edge.un<wbr>r-lcssa<br>
%inc3.epil = phi i32 [ %inc3.unr, %for.cond.for.end_crit_edge.un<wbr>r-lcssa ]<br>
%idxprom.epil = sext i32 %inc3.epil to i64<br>
%arrayidx1.epil = getelementptr inbounds i16, i16* %bit, i64 %idxprom.epil<br>
%8 = load i16, i16* %arrayidx1.epil, align 2<br>
%sub.epil = add nsw i32 %inc3.epil, -1<br>
%idxprom2.epil = sext i32 %sub.epil to i64<br>
%arrayidx3.epil = getelementptr inbounds i16, i16* %bit, i64 %idxprom2.epil<br>
%9 = load i16, i16* %arrayidx3.epil, align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %8, i16 %9)<br>
%inc.epil = add nsw i32 %inc3.epil, 1<br>
%cmp.epil = icmp slt i32 %inc.epil, %n<br>
br label %for.end<br>
<br>
for.end: <wbr> ; preds = %for.body.epil, %for.cond.for.end_crit_edge.un<wbr>r-lcssa, %entry<br>
ret void<br>
}<br>
<br>
; Function Attrs: nounwind<br>
declare void @llvm.H.i16(i16) #1<br>
<br>
; Function Attrs: nounwind<br>
declare void @llvm.CNOT.i16.i16(i16, i16) #1<br>
<br>
; Function Attrs: noinline nounwind uwtable<br>
define void @unCatN(i16* %bit, i32 %n) local_unnamed_addr #0 {<br>
entry:<br>
%storemerge1 = add nsw i32 %n, -1<br>
%cmp2 = icmp sgt i32 %n, 1<br>
br i1 %cmp2, label %for.body.peel, label %for.end<br>
<br>
for.body.peel: <wbr> ; preds = %entry<br>
%idxprom.peel = sext i32 %storemerge1 to i64<br>
%arrayidx.peel = getelementptr inbounds i16, i16* %bit, i64 %idxprom.peel<br>
%0 = load i16, i16* %arrayidx.peel, align 2<br>
%sub1.peel = add nsw i32 %n, -2<br>
%idxprom2.peel = sext i32 %sub1.peel to i64<br>
%arrayidx3.peel = getelementptr inbounds i16, i16* %bit, i64 %idxprom2.peel<br>
%1 = load i16, i16* %arrayidx3.peel, align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %0, i16 %1)<br>
%storemerge.peel = add nsw i32 %storemerge1, -1<br>
%cmp.peel = icmp sgt i32 %storemerge1, 1<br>
br i1 %cmp.peel, label %for.body.lr.ph.peel.newph, label %for.end<br>
<br>
for.body.lr.ph.peel.newph: <wbr> ; preds = %for.body.peel<br>
br label %for.body<br>
<br>
for.body: <wbr> ; preds = %for.body, %for.body.lr.ph.peel.newph<br>
%storemerge5 = phi i32 [ %storemerge.peel, %for.body.lr.ph.peel.newph ], [ %storemerge, %for.body ]<br>
%storemerge.in3 = phi i32 [ %storemerge1, %for.body.lr.ph.peel.newph ], [ %storemerge5, %for.body ]<br>
%idxprom = sext i32 %storemerge5 to i64<br>
%arrayidx = getelementptr inbounds i16, i16* %bit, i64 %idxprom<br>
%2 = load i16, i16* %arrayidx, align 2<br>
%sub1 = add nsw i32 %storemerge.in3, -2<br>
%idxprom2 = sext i32 %sub1 to i64<br>
%arrayidx3 = getelementptr inbounds i16, i16* %bit, i64 %idxprom2<br>
%3 = load i16, i16* %arrayidx3, align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %2, i16 %3)<br>
%storemerge = add nsw i32 %storemerge5, -1<br>
%cmp = icmp sgt i32 %storemerge5, 1<br>
br i1 %cmp, label %for.body, label %for.end, !llvm.loop !2<br>
<br>
for.end: <wbr> ; preds = %for.body, %for.body.peel, %entry<br>
%.lcssa = phi i16* [ %bit, %entry ], [ %bit, %for.body.peel ], [ %bit, %for.body ]<br>
%4 = load i16, i16* %.lcssa, align 2<br>
tail call void @llvm.H.i16(i16 %4)<br>
ret void<br>
}<br>
<br>
; Function Attrs: noinline nounwind uwtable<br>
define i32 @main() local_unnamed_addr #0 {<br>
entry:<br>
%bits = alloca [4 x i16], align 2<br>
%arraydecay = getelementptr inbounds [4 x i16], [4 x i16]* %bits, i64 0, i64 0<br>
call void @catN_IP4_IPx_IPx_IPx_DPx_DPx_<wbr>DPx_DPx(i16* %arraydecay, i32 undef)<br>
ret i32 0<br>
}<br>
<br>
define void @catN_IP4_IPx_IPx_IPx_DPx_DPx_<wbr>DPx_DPx(i16* %bit, i32 %n) {<br>
entry.:<br>
%0 = load i16, i16* %bit, align 2<br>
tail call void @llvm.H.i16(i16 %0)<br>
%arrayidx1. = getelementptr inbounds i16, i16* %bit, <a href="https://maps.google.com/?q=i64+1&entry=gmail&source=g">i64 1</a><br>
%1 = load i16, i16* %arrayidx1., align 2<br>
%2 = load i16, i16* %bit, align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %1, i16 %2)<br>
%arrayidx1.1. = getelementptr inbounds i16, i16* %bit, <a href="https://maps.google.com/?q=i64+2&entry=gmail&source=g">i64 2</a><br>
%3 = load i16, i16* %arrayidx1.1., align 2<br>
%arrayidx3.1. = getelementptr inbounds i16, i16* %bit, <a href="https://maps.google.com/?q=i64+1&entry=gmail&source=g">i64 1</a><br>
%4 = load i16, i16* %arrayidx3.1., align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %3, i16 %4)<br>
%arrayidx1.epil. = getelementptr inbounds i16, i16* %bit, <a href="https://maps.google.com/?q=i64+3&entry=gmail&source=g">i64 3</a><br>
%5 = load i16, i16* %arrayidx1.epil., align 2<br>
%arrayidx3.epil. = getelementptr inbounds i16, i16* %bit, <a href="https://maps.google.com/?q=i64+2&entry=gmail&source=g">i64 2</a><br>
%6 = load i16, i16* %arrayidx3.epil., align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %5, i16 %6)<br>
ret void<br>
}<br>
<br>
attributes #0 = { noinline nounwind uwtable "correctly-rounded-divide-sqrt<wbr>-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-lea<wbr>f" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="fal<wbr>se" "no-trapping-math"="false" "stack-protector-buffer-size"=<wbr>"8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,<wbr>+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }<br>
attributes #1 = { nounwind }<br>
<br>
!llvm.module.flags = !{!0}<br>
!llvm.ident = !{!1}<br>
<br>
!0 = !{i32 1, !"wchar_size", i32 4}<br>
!1 = !{!"clang version 6.0.0 (git@github.com:llvm-mirror/cl<wbr>ang.git 0aed123216ad4a38a9c2b16f178389<wbr>5fd5cb1a04) (git@github.com:llvm-mirror/ll<wbr>vm.git d209b37aec1e392dabbf9b5324ea4a<wbr>60c36fbc55)"}<br>
!2 = distinct !{!2, !3}<br>
!3 = !{!"llvm.loop.unroll.disable"}<br>
<br>
$(OPT) -S cat_state.n044.ll -mem2reg -loops -loop-simplify -loop-rotate -lcssa -loop-unroll -unroll-threshold=100000000 -sccp -simplifycfg -o cat_state.n045.ll<br>
<br>
$ cat cat_state.n045.ll<br>
; ModuleID = 'cat_state.n044.ll'<br>
source_filename = "cat_state.n04_merged.scaffold<wbr>"<br>
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32<wbr>:64-S128"<br>
target triple = "x86_64-unknown-linux-gnu"<br>
<br>
; Function Attrs: noinline nounwind uwtable<br>
define void @catN(i16* %bit, i32 %n) local_unnamed_addr #0 {<br>
entry:<br>
%0 = load i16, i16* %bit, align 2<br>
tail call void @llvm.H.i16(i16 %0)<br>
%cmp1 = icmp sgt i32 %n, 1<br>
br i1 %cmp1, label %<a href="http://for.body.lr.ph" rel="noreferrer" target="_blank">for.body.lr.ph</a>, label %for.end<br>
<br>
<a href="http://for.body.lr.ph" rel="noreferrer" target="_blank">for.body.lr.ph</a>: <wbr> ; preds = %entry<br>
%1 = add i32 %n, -1<br>
%2 = add i32 %n, -2<br>
%xtraiter = and i32 %1, 1<br>
%3 = icmp ult i32 %2, 1<br>
br i1 %3, label %for.cond.for.end_crit_edge.un<wbr>r-lcssa, label %for.body.lr.ph.new<br>
<br>
for.body.lr.ph.new: <wbr> ; preds = %<a href="http://for.body.lr.ph" rel="noreferrer" target="_blank">for.body.lr.ph</a><br>
%unroll_iter = sub i32 %1, %xtraiter<br>
br label %for.body<br>
<br>
for.body: <wbr> ; preds = %for.body, %for.body.lr.ph.new<br>
%inc3 = phi i32 [ 1, %for.body.lr.ph.new ], [ %inc.1, %for.body ]<br>
%niter = phi i32 [ %unroll_iter, %for.body.lr.ph.new ], [ %niter.nsub.1, %for.body ]<br>
%idxprom = sext i32 %inc3 to i64<br>
%arrayidx1 = getelementptr inbounds i16, i16* %bit, i64 %idxprom<br>
%4 = load i16, i16* %arrayidx1, align 2<br>
%sub = add nsw i32 %inc3, -1<br>
%idxprom2 = sext i32 %sub to i64<br>
%arrayidx3 = getelementptr inbounds i16, i16* %bit, i64 %idxprom2<br>
%5 = load i16, i16* %arrayidx3, align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %4, i16 %5)<br>
%inc = add nsw i32 %inc3, 1<br>
%niter.nsub = sub i32 %niter, 1<br>
%idxprom.1 = sext i32 %inc to i64<br>
%arrayidx1.1 = getelementptr inbounds i16, i16* %bit, i64 %idxprom.1<br>
%6 = load i16, i16* %arrayidx1.1, align 2<br>
%idxprom2.1 = sext i32 %inc3 to i64<br>
%arrayidx3.1 = getelementptr inbounds i16, i16* %bit, i64 %idxprom2.1<br>
%7 = load i16, i16* %arrayidx3.1, align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %6, i16 %7)<br>
%inc.1 = add nsw i32 %inc, 1<br>
%niter.nsub.1 = sub i32 %niter.nsub, 1<br>
%niter.ncmp.1 = icmp ne i32 %niter.nsub.1, 0<br>
br i1 %niter.ncmp.1, label %for.body, label %for.cond.for.end_crit_edge.un<wbr>r-lcssa<br>
<br>
for.cond.for.end_crit_edge.unr<wbr>-lcssa: ; preds = %for.body, %<a href="http://for.body.lr.ph" rel="noreferrer" target="_blank">for.body.lr.ph</a><br>
%inc3.unr = phi i32 [ 1, %<a href="http://for.body.lr.ph" rel="noreferrer" target="_blank">for.body.lr.ph</a> ], [ %inc.1, %for.body ]<br>
%lcmp.mod = icmp ne i32 %xtraiter, 0<br>
br i1 %lcmp.mod, label %for.body.epil, label %for.end<br>
<br>
for.body.epil: <wbr> ; preds = %for.cond.for.end_crit_edge.un<wbr>r-lcssa<br>
%inc3.epil = phi i32 [ %inc3.unr, %for.cond.for.end_crit_edge.un<wbr>r-lcssa ]<br>
%idxprom.epil = sext i32 %inc3.epil to i64<br>
%arrayidx1.epil = getelementptr inbounds i16, i16* %bit, i64 %idxprom.epil<br>
%8 = load i16, i16* %arrayidx1.epil, align 2<br>
%sub.epil = add nsw i32 %inc3.epil, -1<br>
%idxprom2.epil = sext i32 %sub.epil to i64<br>
%arrayidx3.epil = getelementptr inbounds i16, i16* %bit, i64 %idxprom2.epil<br>
%9 = load i16, i16* %arrayidx3.epil, align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %8, i16 %9)<br>
%inc.epil = add nsw i32 %inc3.epil, 1<br>
%cmp.epil = icmp slt i32 %inc.epil, %n<br>
br label %for.end<br>
<br>
for.end: <wbr> ; preds = %for.body.epil, %for.cond.for.end_crit_edge.un<wbr>r-lcssa, %entry<br>
ret void<br>
}<br>
<br>
; Function Attrs: nounwind<br>
declare void @llvm.H.i16(i16) #1<br>
<br>
; Function Attrs: nounwind<br>
declare void @llvm.CNOT.i16.i16(i16, i16) #1<br>
<br>
; Function Attrs: noinline nounwind uwtable<br>
define void @unCatN(i16* %bit, i32 %n) local_unnamed_addr #0 {<br>
entry:<br>
%storemerge1 = add nsw i32 %n, -1<br>
%cmp2 = icmp sgt i32 %n, 1<br>
br i1 %cmp2, label %for.body.peel, label %for.end<br>
<br>
for.body.peel: <wbr> ; preds = %entry<br>
%idxprom.peel = sext i32 %storemerge1 to i64<br>
%arrayidx.peel = getelementptr inbounds i16, i16* %bit, i64 %idxprom.peel<br>
%0 = load i16, i16* %arrayidx.peel, align 2<br>
%sub1.peel = add nsw i32 %n, -2<br>
%idxprom2.peel = sext i32 %sub1.peel to i64<br>
%arrayidx3.peel = getelementptr inbounds i16, i16* %bit, i64 %idxprom2.peel<br>
%1 = load i16, i16* %arrayidx3.peel, align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %0, i16 %1)<br>
%storemerge.peel = add nsw i32 %storemerge1, -1<br>
%cmp.peel = icmp sgt i32 %storemerge1, 1<br>
br i1 %cmp.peel, label %for.body.lr.ph.peel.newph, label %for.end<br>
<br>
for.body.lr.ph.peel.newph: <wbr> ; preds = %for.body.peel<br>
br label %for.body<br>
<br>
for.body: <wbr> ; preds = %for.body, %for.body.lr.ph.peel.newph<br>
%storemerge5 = phi i32 [ %storemerge.peel, %for.body.lr.ph.peel.newph ], [ %storemerge, %for.body ]<br>
%storemerge.in3 = phi i32 [ %storemerge1, %for.body.lr.ph.peel.newph ], [ %storemerge5, %for.body ]<br>
%idxprom = sext i32 %storemerge5 to i64<br>
%arrayidx = getelementptr inbounds i16, i16* %bit, i64 %idxprom<br>
%2 = load i16, i16* %arrayidx, align 2<br>
%sub1 = add nsw i32 %storemerge.in3, -2<br>
%idxprom2 = sext i32 %sub1 to i64<br>
%arrayidx3 = getelementptr inbounds i16, i16* %bit, i64 %idxprom2<br>
%3 = load i16, i16* %arrayidx3, align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %2, i16 %3)<br>
%storemerge = add nsw i32 %storemerge5, -1<br>
%cmp = icmp sgt i32 %storemerge5, 1<br>
br i1 %cmp, label %for.body, label %for.end, !llvm.loop !2<br>
<br>
for.end: <wbr> ; preds = %for.body, %for.body.peel, %entry<br>
%.lcssa = phi i16* [ %bit, %entry ], [ %bit, %for.body.peel ], [ %bit, %for.body ]<br>
%4 = load i16, i16* %.lcssa, align 2<br>
tail call void @llvm.H.i16(i16 %4)<br>
ret void<br>
}<br>
<br>
; Function Attrs: noinline nounwind uwtable<br>
define i32 @main() local_unnamed_addr #0 {<br>
entry:<br>
%bits = alloca [4 x i16], align 2<br>
%arraydecay = getelementptr inbounds [4 x i16], [4 x i16]* %bits, i64 0, i64 0<br>
call void @catN_IP4_IPx_IPx_IPx_DPx_DPx_<wbr>DPx_DPx(i16* %arraydecay, i32 undef)<br>
ret i32 0<br>
}<br>
<br>
define void @catN_IP4_IPx_IPx_IPx_DPx_DPx_<wbr>DPx_DPx(i16* %bit, i32 %n) {<br>
entry.:<br>
%0 = load i16, i16* %bit, align 2<br>
tail call void @llvm.H.i16(i16 %0)<br>
%arrayidx1. = getelementptr inbounds i16, i16* %bit, <a href="https://maps.google.com/?q=i64+1&entry=gmail&source=g">i64 1</a><br>
%1 = load i16, i16* %arrayidx1., align 2<br>
%2 = load i16, i16* %bit, align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %1, i16 %2)<br>
%arrayidx1.1. = getelementptr inbounds i16, i16* %bit, <a href="https://maps.google.com/?q=i64+2&entry=gmail&source=g">i64 2</a><br>
%3 = load i16, i16* %arrayidx1.1., align 2<br>
%arrayidx3.1. = getelementptr inbounds i16, i16* %bit, <a href="https://maps.google.com/?q=i64+1&entry=gmail&source=g">i64 1</a><br>
%4 = load i16, i16* %arrayidx3.1., align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %3, i16 %4)<br>
%arrayidx1.epil. = getelementptr inbounds i16, i16* %bit, <a href="https://maps.google.com/?q=i64+3&entry=gmail&source=g">i64 3</a><br>
%5 = load i16, i16* %arrayidx1.epil., align 2<br>
%arrayidx3.epil. = getelementptr inbounds i16, i16* %bit, <a href="https://maps.google.com/?q=i64+2&entry=gmail&source=g">i64 2</a><br>
%6 = load i16, i16* %arrayidx3.epil., align 2<br>
tail call void @llvm.CNOT.i16.i16(i16 %5, i16 %6)<br>
ret void<br>
}<br>
<br>
attributes #0 = { noinline nounwind uwtable "correctly-rounded-divide-sqrt<wbr>-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-lea<wbr>f" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="fal<wbr>se" "no-trapping-math"="false" "stack-protector-buffer-size"=<wbr>"8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,<wbr>+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }<br>
attributes #1 = { nounwind }<br>
<br>
!llvm.module.flags = !{!0}<br>
!llvm.ident = !{!1}<br>
<br>
!0 = !{i32 1, !"wchar_size", i32 4}<br>
!1 = !{!"clang version 6.0.0 (git@github.com:llvm-mirror/cl<wbr>ang.git 0aed123216ad4a38a9c2b16f178389<wbr>5fd5cb1a04) (git@github.com:llvm-mirror/ll<wbr>vm.git d209b37aec1e392dabbf9b5324ea4a<wbr>60c36fbc55)"}<br>
!2 = distinct !{!2, !3}<br>
!3 = !{!"llvm.loop.unroll.disable"}<br>
<br>
<br>
There are still for *loops* in catN and unCatN Functions, workaround might be using GlobalDCE PASS towards cat_state.n045.ll to remove !Live DeadFunctions.<br>
<br>
Cat_State testcase: <a href="https://github.com/ScaffCC/ScaffCC/blob/master/Algorithms/Cat_State/cat_state.n04.scaffold" rel="noreferrer" target="_blank">https://github.com/ScaffCC/Sca<wbr>ffCC/blob/master/Algorithms/<wbr>Cat_State/cat_state.n04.<wbr>scaffold</a><br>
<br>
Scaffold builtin gates: <a href="https://github.com/ScaffCC/scaff-clang/blob/master/include/clang/Basic/Builtins.def#L108" rel="noreferrer" target="_blank">https://github.com/ScaffCC/sca<wbr>ff-clang/blob/master/include/<wbr>clang/Basic/Builtins.def#L108</a><br>
<br>
Ali JavadiAbhari, Shruti Patil, Daniel Kudrow, Jeff Heckey, Alexey Lvov, Frederic Chong and Margaret Martonosi, ScaffCC: A Framework for Compilation and Analysis of Quantum Computing Programs, ACM International Conference on Computing Frontiers (CF 2014), Cagliari, Italy, May 2014<br>
<br>
<br>
在 2017年10月24日 12:52, Michael Kruse 写道:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
2017-10-24 6:19 GMT+02:00 Leslie Zhai via llvm-dev <<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a> <mailto:<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.or<wbr>g</a>>>:<br>
> attributes #0 = { noinline nounwind *optnone *uwtable<br>
<br>
The optnone attribute (added by clang in -O0) says LLV? to not apply any transformation. Avoid with -Xclang -disable-O0-optnone<br>
<br>
Michael<br>
<br><span class="HOEnZb"><font color="#888888">
</font></span></blockquote><span class="HOEnZb"><font color="#888888">
<br>
-- <br>
Regards,<br>
Leslie Zhai - <a href="https://reviews.llvm.org/p/xiangzhai/" rel="noreferrer" target="_blank">https://reviews.llvm.org/p/xia<wbr>ngzhai/</a><br>
<br>
<br>
<br>
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