<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Oct 3, 2017 at 9:21 AM, Jun Lim via llvm-dev <span dir="ltr"><<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div lang="EN-US" link="blue" vlink="purple"><div class="m_4051889560643542791WordSection1"><p class="MsoNormal">Hi Graham, <u></u><u></u></p><p class="MsoNormal"><u></u> <u></u></p><p class="MsoNormal">Thanks for sharing this. Are you planning on enabling the pass only on PGO? Even in non-PGO, I noticed some performance gains when we are aggressive in partially inlining the early return part, especially when the callee spill CSRs in the entry block. At a high level, I have two questions: <u></u><u></u></p><ol style="margin-top:0in" start="1" type="1"><li class="m_4051889560643542791MsoListParagraph">What is the main obstacle that prevent the pass from being enabled by default? <u></u><u></u></li><li class="m_4051889560643542791MsoListParagraph">Would it make sense to give some bonus in the cost model when we detect the possibility of spilling CSRs in the entry block?</li></ol></div></div></blockquote><div>More enhanced shrink-wrapping will probably take care of this, so using partial inlining to do that seems like a wrong motivation :)</div><div><br></div><div>David</div><div><br></div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div lang="EN-US" link="blue" vlink="purple"><div class="m_4051889560643542791WordSection1"><ol style="margin-top:0in" start="1" type="1"><li class="m_4051889560643542791MsoListParagraph"> <u></u><u></u></li></ol><p class="MsoNormal"><u></u> <u></u></p><p class="MsoNormal">Thanks,<u></u><u></u></p><p class="MsoNormal">Jun<u></u><u></u></p><p class="MsoNormal"> <u></u><u></u></p><div><div style="border:none;border-top:solid #e1e1e1 1.0pt;padding:3.0pt 0in 0in 0in"><p class="MsoNormal"><b>From:</b> Graham Yiu [mailto:<a href="mailto:gyiu@ca.ibm.com" target="_blank">gyiu@ca.ibm.com</a>] <br><b>Sent:</b> Tuesday, October 3, 2017 11:08 AM<br><b>To:</b> <a href="mailto:junbuml@codeaurora.org" target="_blank">junbuml@codeaurora.org</a><br><b>Cc:</b> <a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a><br><b>Subject:</b> Re: [llvm-dev] General question about enabling partial inlining<u></u><u></u></p></div></div><div><div class="h5"><p class="MsoNormal"><u></u> <u></u></p><p><span style="font-size:10.0pt">Hi Jun,</span><br><br><span style="font-size:10.0pt">We're actually looking at enhancing the partial inlining pass right now (see </span><a href="http://lists.llvm.org/pipermail/llvm-dev/2017-August/116515.html" target="_blank"><span style="font-size:10.0pt">http://lists.llvm.org/<wbr>pipermail/llvm-dev/2017-<wbr>August/116515.html</span></a><span style="font-size:10.0pt">)</span><br><br><span style="font-size:10.0pt">We'd be interested in turning on the pass by default some time in the future, if our enhancements prove beneficial.</span><br><br><span style="font-size:10.0pt">Cheers,</span><br><br><span style="font-size:10.0pt">Graham Yiu<br>LLVM Compiler Development<br>IBM Toronto Software Lab<br>Office: <a href="tel:(905)%20413-4077" value="+19054134077" target="_blank">(905) 413-4077</a> C2-707/8200/Markham<br>Email: <a href="mailto:gyiu@ca.ibm.com" target="_blank">gyiu@ca.ibm.com</a></span><br><br><img border="0" width="16" height="16" style="width:.1666in;height:.1666in" id="m_4051889560643542791_x0000_i1025" src="cid:image001.gif@01D33C39.B4153ED0" alt="Inactive hide details for via llvm-dev ---09/13/2017 01:12:02 PM---Hi, I noticed some performance gains in some spec benchmarks"><span style="font-size:10.0pt;color:#424282">via llvm-dev ---09/13/2017 01:12:02 PM---Hi, I noticed some performance gains in some spec benchmarks without</span><br><br><span style="font-size:10.0pt;color:#5f5f5f">From: </span><span style="font-size:10.0pt">via llvm-dev <<a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a>></span><br><span style="font-size:10.0pt;color:#5f5f5f">To: </span><span style="font-size:10.0pt"><a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a></span><br><span style="font-size:10.0pt;color:#5f5f5f">Date: </span><span style="font-size:10.0pt">09/13/2017 01:12 PM</span><br><span style="font-size:10.0pt;color:#5f5f5f">Subject: </span><span style="font-size:10.0pt">[llvm-dev] General question about enabling partial inlining</span><br><span style="font-size:10.0pt;color:#5f5f5f">Sent by: </span><span style="font-size:10.0pt">"llvm-dev" <<a href="mailto:llvm-dev-bounces@lists.llvm.org" target="_blank">llvm-dev-bounces@lists.llvm.<wbr>org</a>></span><u></u><u></u></p><div class="MsoNormal"><hr size="2" width="100%" noshade style="color:#8091a5" align="left"></div><p class="MsoNormal" style="margin-bottom:12.0pt"><br><br><br><tt><span style="font-size:10.0pt">Hi,</span></tt><span style="font-size:10.0pt;font-family:"Courier New""><br><br><tt>I noticed some performance gains in some spec benchmarks without </tt><br><tt>significant code size bloat when aggressively performing partial </tt><br><tt>inlining, especially when the original callee spill CSRs in the entry </tt><br><tt>block. I guess the partial inlining is not enabled mainly due to the </tt><br><tt>code size. Is there any other issue which prevent the pass from being </tt><br><tt>enabled? Do we have any plan or any on-going works to enable partial </tt><br><tt>inlining ?</tt><br><tt>Thanks,</tt><br><tt>Jun</tt><br><br><tt>-- </tt><br><tt>Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm </tt><br><tt>Technologies, Inc.</tt><br><tt>Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a </tt><br><tt>Linux Foundation Collaborative Project.</tt><br><tt>______________________________<wbr>_________________</tt><br><tt>LLVM Developers mailing list</tt><br><tt><a href="mailto:llvm-dev@lists.llvm.org" target="_blank">llvm-dev@lists.llvm.org</a></tt><br><tt><a href="https://urldefense.proofpoint.com/v2/url?u=http-3A__lists.llvm.org_cgi-2Dbin_mailman_listinfo_llvm-2Ddev&d=DwIGaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=4ST7e3kMd0GTi3w9ByK5Cw&m=zEValqMYe9FvZqI-GQUgWPmVUgbEq8OBAjTrBjz9xhY&s=1h4Cw3vDlJBIknkn0Ts3R_e3PU64h_dyvEkyCdonAVo&e=" target="_blank">https://urldefense.proofpoint.<wbr>com/v2/url?u=http-3A__lists.<wbr>llvm.org_cgi-2Dbin_mailman_<wbr>listinfo_llvm-2Ddev&d=DwIGaQ&<wbr>c=jf_iaSHvJObTbx-siA1ZOg&r=<wbr>4ST7e3kMd0GTi3w9ByK5Cw&m=<wbr>zEValqMYe9FvZqI-<wbr>GQUgWPmVUgbEq8OBAjTrBjz9xhY&s=<wbr>1h4Cw3vDlJBIknkn0Ts3R_e3PU64h_<wbr>dyvEkyCdonAVo&e=</a> </tt><br><br></span><br><br><u></u><u></u></p></div></div></div></div><br>______________________________<wbr>_________________<br>
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